EVALUATION KIT AVAILABLE

MAX668/MAX669
LE
AVAILAB

1.8V to 28V Input, PWM Step-Up

Controllers in µMAX
General Description Features
The MAX668/MAX669 constant-frequency, pulse-width- o 1.8V Minimum Start-Up Voltage (MAX669)
modulating (PWM), current-mode DC-DC controllers are o Wide Input Voltage Range (1.8V to 28V)
designed for a wide range of DC-DC conversion applica- o Tiny 10-Pin µMAX Package
tions including step-up, SEPIC, flyback, and isolated-
output configurations. Power levels of 20W or more can o Current-Mode PWM and Idle Mode™ Operation
be controlled with conversion efficiencies of over 90%. o Efficiency over 90%
The 1.8V to 28V input voltage range supports a wide o Adjustable 100kHz to 500kHz Oscillator or
range of battery and AC-powered inputs. An advanced SYNC Input
BiCMOS design features low operating current (220µA), o 220µA Quiescent Current
adjustable operating frequency (100kHz to 500kHz), o Logic-Level Shutdown
soft-start, and a SYNC input allowing the MAX668/
MAX669 oscillator to be locked to an external clock. o Soft-Start
DC-DC conversion efficiency is optimized with a low Applications
100mV current-sense voltage as well as with Maxim’s Cellular Telephones
proprietary Idle Mode™ control scheme. The controller Telecom Hardware
operates in PWM mode at medium and heavy loads for
lowest noise and optimum efficiency, then pulses only as LANs and Network Systems
needed (with reduced inductor current) to reduce oper- POS Systems
ating current and maximize efficiency under light loads.
A logic-level shutdown input is also included, reducing Ordering Information
supply current to 3.5µA. PART TEMP RANGE PIN-PACKAGE
The MAX669, optimized for low input voltages with a MAX668EUB -40°C to +85°C 10 µMAX
guaranteed start-up voltage of 1.8V, requires boot- MAX669EUB -40°C to +85°C 10 µMAX
strapped operation (IC powered from boosted output). It
MAX669EUB/V+T -40°C to +85°C 10 µMAX
supports output voltages up to 28V. The MAX668 oper-
ates with inputs as low as 3V and can be connected in Idle Mode is a trademark of Maxim Integrated Products.
either a bootstrapped or non-bootstrapped (IC powered + Denotes a lead(Pb)-free/RoHS-compliant package.
from input supply or other source) configuration. When T = Tape and reel.
not bootstrapped, it has no restriction on output voltage. /V Denotes an automotive qualified part.
Both ICs are availableFunctional
in an extremely Diagrams
compact 10-pin Note: Devices are also available in a lead(Pb)-free/RoHS-com-
µMAX package. pliant package. Specify lead-free by adding “+” to the part
number when ordering.
Typical Operating Circuit Pin Configuration

VIN = 1.8V to 28V

TOP VIEW

VOUT = 28V
VCC
SYNC/ EXT LDO 1 10 SYNC/SHDN
SHDN
FREQ 2 9 VCC
FREQ CS+ MAX668
GND 3 MAX669 8 EXT
MAX669 REF 4 7 PGND

LDO PGND FB 5 6 CS+

FB µMAX
REF
GND
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.

For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com. 19-4778; Rev 2; 1/12
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
ABSOLUTE MAXIMUM RATINGS
VCC to GND ..........................................................-0.3V to +30V Continuous Power Dissipation (TA = +70°C)
PGND to GND....................................................................±0.3V 10-Pin µMAX (derate 5.6mW/°C above +70°C) ............444mW
SYNC/SHDN to GND .............................................-0.3V to +30V Operating Temperature Range ...........................-40°C to +85°C
EXT, REF to GND.....................................-0.3V to (VLDO + 0.3V) Junction Temperature ......................................................+150°C
LDO, FREQ, FB, CS+ to GND ................................ -0.3V to +6V Storage Temperature Range .............................-65°C to +150°C
LDO Output Current...........................................-1mA to +20mA Lead Temperature (soldering,10sec) ..............................+300°C
REF Output Current..............................................-1mA to +1mA Soldering Temperature (Reflow) ......................................+300°C
LDO Short Circuit to GND .........................................Momentary Lead(Pb)-Free Packages..............................................+260°C
REF Short Circuit to GND ..........................................Continuous Packages Containing Lead(Pb)....................................+240°C

ELECTRICAL CHARACTERISTICS
(VCC = VLDO = +5V, ROSC = 200kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
PWM
PWM Controller
CONTROLLER
MAX668 3 28
Input Voltage Range, VCC V
MAX669 1.8 28
Input Voltage Range with VCC Tied to LDO 2.7 5.5 V
FB Threshold 1.225 1.250 1.275 V
Typically 0.013% per mV on CS+;
FB Threshold Load Regulation VCS+ range is 0 to 100mV for 0 to full 0.013 %/mV
load current.

Typically 0.012% per % duty factor on

FB Threshold Line Regulation EXT; EXT duty factor for a step-up is: 0.012 %/%
100% (1 – VIN/VOUT)
FB Input Current VFB = 1.30V 1 20 nA
Current Limit Threshold 85 100 115 mV
Idle Mode Current-Sense Threshold 5 15 25 mV
CS+ Input Current CS+ forced to GND 0.2 1 µA
VCC Supply Current (Note 1) VFB = 1.30V, VCC = 3V to 28V 220 350 µA
Shutdown Supply Current (VCC) SYNC/SHDN = GND, VCC = 28V 3.5 6 µA
REFERENCE
Reference and
AND
LDOLDO
Regulators
REGULATORS
5V ≤ VCC ≤ 28V
4.50 5.00 5.50
LDO load = (includes LDO dropout)
LDO Output Voltage V
∞ to 400Ω 3V ≤ VCC ≤ 28V
2.65 5.50
(includes LDO dropout)
Sensed at LDO, falling edge,
Undervoltage Lockout Threshold 2.40 2.50 2.60 V
hysteresis = 1%, MAX668 only
REF Output Voltage No load, CREF = 0.22µF 1.225 1.250 1.275 V
REF Load Regulation REF load = 0 to 50µA -2 -10 mV
REF Undervoltage Lockout Threshold Rising edge, 1% hysteresis 1.0 1.1 1.2 V
OSCILLATOR
Oscillator
ROSC = 200kΩ ±1% 225 250 275
Oscillator Frequency ROSC = 100kΩ ±1% 425 500 575 kHz
ROSC = 500kΩ ±1% 85 100 115

2 Maxim Integrated
 MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
ELECTRICAL CHARACTERISTICS (continued)
(VCC = VLDO = +5V, ROSC = 200kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
ROSC = 200kΩ ±1% 87 90 93
Maximum Duty Cycle ROSC = 100kΩ ±1% 86 90 94 %
ROSC = 500kΩ ±1% 86 90 94
Minimum EXT Pulse Width 290 ns
Minimum SYNC Input-Pulse Duty Cycle 20 45 %
Minimum SYNC Input Low Pulse Width 50 200 ns
SYNC Input Rise/Fall Time Not tested 200 ns
SYNC Input Frequency Range 100 500 kHz
SYNC/SHDN Falling Edge to Shutdown Delay 70 µs
3.0V < VCC < 28V 2.0
SYNC/SHDN Input High Voltage V
1.8V < VCC < 3.0V (MAX669) 1.5
3.0V < VCC < 28V 0.45
SYNC/SHDN Input Low Voltage V
1.8V < VCC < 3.0V (MAX669) 0.30
VSYNC/SHDN = 5V 0.5 3.0
SYNC/SHDN Input Current µA
VSYNC/SHDN = 28V 1.5 6.5
EXT Sink/Source Current EXT forced to 2V 1 A
EXT On-Resistance EXT high or low 2 5 Ω

ELECTRICAL CHARACTERISTICS
(VCC = VLDO = +5V, ROSC = 200kΩ, TA = -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETER CONDITIONS MIN MAX UNITS
PWM
PWM Controller
CONTROLLER
MAX668 3 28
Input Voltage Range, VCC V
MAX669 1.8 28
Input Voltage Range with VCC Tied to LDO 2.7 5.5 V
FB Threshold 1.22 1.28 V
FB Input Current VFB = 1.30V 20 nA
Current-Limit Threshold 85 115 mV
Idle Mode Current-Sense Threshold 3 27 mV
CS+ Input Current CS+ forced to GND 1 µA
VCC Supply Current (Note 1) VFB = 1.30V, VCC = 3V to 28V 350 µA
Shutdown Supply Current (VCC) SYNC/SHDN = GND, VCC = 28V 6 µA
Reference
REFERENCE andAND
LDOLDO
Regulators
REGULATORS
5V ≤ VCC ≤ 28V
4.50 5.50
LDO load = (includes LDO dropout)
LDO Output Voltage V
∞ to 400Ω 3V ≤ VCC ≤ 28V
2.65 5.50 V
(includes LDO dropout)
Sensed at LDO, falling edge,
LDO Undervoltage Lockout Threshold 2.40 2.60 V
hysteresis = 1%, MAX669 only

Maxim Integrated 3
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
ELECTRICAL CHARACTERISTICS (continued)
(VCC = VLDO = +5V, ROSC = 200kΩ, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER CONDITIONS MIN MAX UNITS
REF Output Voltage No load, CREF = 0.22µF 1.22 1.28 V
REF Load Regulation REF load = 0 to 50µA -10 mV
REF Undervoltage Lockout Threshold Rising edge, 1% hysteresis 1.0 1.2 V
OSCILLATOR
ROSC = 200kΩ ±1% 222 278
Oscillator Frequency ROSC =100kΩ ±1% 425 575 kHz
ROSC = 500kΩ ±1% 85 115
ROSC = 200kΩ ±1% 87 93
Maximum Duty Cycle ROSC = 100kΩ ±1% 86 94 %
ROSC = 500kΩ ±1% 86 94
Minimum SYNC Input-Pulse Duty Cycle 45 %
Minimum SYNC Input Low Pulse Width 200 ns
SYNC Input Rise/Fall Time Not tested 200 ns
SYNC Input Frequency Range 100 500 kHz
3.0V < VCC < 28V 2.0
SYNC/SHDN Input High Voltage V
1.8V < VCC < 3.0V (MAX669) 1.5
3.0V < VCC < 28V 0.45
SYNC/SHDN Input Low Voltage V
1.8V < VCC < 3.0V (MAX669) 0.30
VSYNC/SHDN = 5V 3.0
SYNC/SHDN Input Current µA
VSYNC/SHDN = 28V 6.5
EXT On-Resistance EXT high or low 5 Ω
Note 1: This is the VCC current consumed when active but not switching. Does not include gate-drive current.
Note 2: Limits at TA = -40°C are guaranteed by design.

4 Maxim Integrated
 MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Typical Operating Characteristics
(Circuits of Figures 2, 3, 4, and 5; TA = +25°C; unless otherwise noted.)

EFFICIENCY vs. LOAD CURRENT MAX668 EFFICIENCY vs. MAX668 EFFICIENCY vs.
(VOUT = 5V) LOAD CURRENT (VOUT = 12V) LOAD CURRENT (VOUT = 24V)
95 95 95

MAX668 toc02

MAX668 toc03
VIN = 3.6V MAX668 toc01
90 VIN = 12V
VIN = 3.3V
90 90 VIN = 8V
85
80
EFFICIENCY (%)

EFFICIENCY (%)
EFFICIENCY (%)

VIN = 2.7V
85 85
75 VIN = 2V VIN = 5V

70
80 80
65
VIN = 5V
60 BOOTSTRAPPED 75 NON-BOOTSTRAPPED 75 NON-BOOTSTRAPPED
FIGURE 3 FIGURE 4 FIGURE 4
55 R4 = 200kΩ
R4 = 200kΩ R4 = 200kΩ
50 70 70
1 10 100 1000 10,000 1 10 100 1000 10,000 1 10 100 1000 10,000
LOAD CURRENT (mA) LOAD CURRENT (mA) LOAD CURRENT (mA)

MAX669 MINIMUM START-UP VOLTAGE SUPPLY CURRENT vs. NO-LOAD SUPPLY CURRENT vs.
vs. LOAD CURRENT SUPPLY VOLTAGE SUPPLY VOLTAGE
3.0 1200 MAX668 toc05 4000

MAX668 toc06
MAX668 toc04

CURRENT INTO VCC PIN VOUT = 12V

VOUT = 5V 3500
MINIMUM START-UP VOLTAGE (V)

ROSC = 500kΩ BOOTSTRAPPED

NO-LOAD SUPPLY CURRENT (µA)
2.5 1000
FIGURE 2
3000
SUPPLY CURRENT (µA)

R4 = 200kΩ
2.0 800
2500
VOUT = 12V
1.5 600 MAX669 2000

1500
1.0 400
1000
0.5 200
BOOTSTRAPPED 500
FIGURE 2 MAX668
0 0 0
0 100 200 300 400 500 600 700 800 900 1000 0 5 10 15 20 25 30 0 2 4 6 8 10 12
LOAD CURRENT (mA) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)

SHUTDOWN CURRENT vs. SUPPLY CURRENT vs. LDO DROPOUT VOLTAGE vs.
SUPPLY VOLTAGE TEMPERATURE LDO CURRENT
3.5 290 300
MAX668 toc08

MAX668 toc09
MAX668 toc07

MAX669
3.0 270 250
LDO DROPOUT VOLTAGE (mV)
SHUTDOWN CURRENT (µA)

ROSC = 100kΩ
VIN = 3V
SUPPLY CURRENT (µA)

2.5 250
MAX668 200
2.0 230
ROSC = 200kΩ 150
1.5 210 VIN = 4.5V
ROSC = 500kΩ 100
1.0 190

0.5 170 50
CURRENT INTO VCC PIN
0 150 0
0 5 10 15 20 25 30 -40 -20 0 20 40 60 80 100 0.1 1 10 20
SUPPLY VOLTAGE (V) TEMPERATURE (°C) LDO CURRENT (mA)

Maxim Integrated 5
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Typical Operating Characteristics (continued)
(Circuits of Figures 2, 3, 4, and 5; TA = +25°C; unless otherwise noted.)

REFERENCE VOLTAGE vs.

TEMPERATURE SWITCHING FREQUENCY vs. ROSC
1.250 500

MAX668 toc10

MAX668 toc11
1.249 450
1.248

SWITCHING FREQUENCY (kHz)

400
REFERENCE VOLTAGE (V)

1.247 350
1.246 300
1.245 250
1.244 200
1.243 150
1.242 100
1.241 50
VCC = 5V VCC = 5V
1.240 0
-40 -20 0 20 40 60 80 100 0 100 200 300 400 500
TEMPERATURE (°C) ROSC (kΩ)

SWITCHING FREQUENCY vs. EXT RISE/FALL TIME vs.

TEMPERATURE CAPACITANCE
600 60

MAX668 toc13
MAX668 toc12

100kΩ
500 50
SWITCHING FREQUENCY (kHz)

EXT RISE/FALL TIME (ns)

tR, VCC = 3.3V

400 40

165kΩ tF, VCC = 3.3V

300 30

200 20

499kΩ tR, VCC = 5V

100 10
VIN = 5V tF, VCC = 5V
0 0
-40 -20 0 20 40 60 80 100 100 1000 10,000
TEMPERATURE (°C) CAPACITANCE (pF)

6 Maxim Integrated
 MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Typical Operating Characteristics (continued)
(Circuits of Figures 2, 3, 4, and 5; TA = +25°C; unless otherwise noted.)

EXITING SHUTDOWN ENTERING SHUTDOWN

MAX668 toc15
MAX668 toc14
0V
OUTPUT SHUTDOWN
0V
VOLTAGE VOLTAGE
5V/div 5V/div

INDUCTOR
CURRENT 0A
2A/div

SHUTDOWN 0V OUTPUT 0V
VOLTAGE VOLTAGE
5V/div 5V/div
500µs/div 200µs/div
MAX668, VIN = 5V, VOUT = 12V, LOAD = 1.0A, ROSC = 100kΩ, MAX668, VIN = 5V, VOUT = 12V, LOAD = 1.0A,
LOW VOLTAGE, NON-BOOTSTRAPPED LOW VOLTAGE, NON-BOOTSTRAPPED

HEAVY-LOAD SWITCHING WAVEFORM LIGHT-LOAD SWITCHING WAVEFORM

MAX668 toc17
MAX668 toc16

VOUT
VOUT
100mV/div
200mV/div
AC-COUPLED
AC-COUPLED

Q1, DRAIN Q1, DRAIN

5V/div 5V/div
0V 0V

IL IL 0A
0A 1A/div
1A/div

1µs/div 1µs/div
MAX668, VIN = 5V, VOUT = 12V, ILOAD = 1.0A, MAX668, VIN = 5V, VOUT = 12V, ILOAD = 0.1A,
LOW VOLTAGE, NON-BOOTSTRAPPED LOW VOLTAGE, NON-BOOTSTRAPPED

LOAD-TRANSIENT RESPONSE LINE-TRANSIENT RESPONSE

MAX668 toc18

MAX668 toc19

OUTPUT OUTPUT
VOLTAGE VOLTAGE
AC-COUPLED 100mV/div
100mV/div AC-COUPLED

LOAD INPUT 0V
CURRENT VOLTAGE
1A/div 5V/div
1ms/div 20ms/div
MAX668, VIN = 5V, VOUT = 12V, ILOAD = 0.1A TO 1.0A, MAX668, VIN = 5V TO 8V, VOUT = 12V, LOAD = 1.0A,
LOW VOLTAGE, NON-BOOTSTRAPPED HIGH VOLTAGE, NON-BOOTSTRAPPED

Maxim Integrated 7
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Pin Description
PIN NAME FUNCTION
5V On-Chip Regulator Output. This regulator powers all internal circuitry including the EXT gate driver.
1 LDO
Bypass LDO to GND with a 1µF or greater ceramic capacitor.

Oscillator Frequency Set Input. A resistor from FREQ to GND sets the oscillator from 100kHz (ROSC =
2 FREQ 500kΩ) to 500kHz (ROSC = 100kΩ). fOSC = 5 x 1010 / ROSC. ROSC is still required if an external clock is used
at SYNC/SHDN. (See SYNC/SHDN and FREQ Inputs section.)
3 GND Analog Ground
4 REF 1.25V Reference Output. REF can source 50µA. Bypass to GND with a 0.22µF ceramic capacitor.
5 FB Feedback Input. The FB threshold is 1.25V.
6 CS+ Positive Current-Sense Input. Connect a current-sense resistor, RCS, between CS+ and PGND.
7 PGND Power Ground for EXT Gate Driver and Negative Current-Sense Input
8 EXT External MOSFET Gate-Driver Output. EXT swings from LDO to PGND.
Input Supply to On-Chip LDO Regulator. VCC accepts inputs up to 28V. Bypass to GND with a 0.1µF ceramic
9 VCC
capacitor.

Shutdown control and Synchronization Input. There are three operating modes:
• SYNC/SHDN low: DC-DC off.
SYNC/
10 • SYNC/SHDN high: DC-DC on with oscillator frequency set at FREQ by ROSC.
SHDN
• SYNC/SHDN clocked: DC-DC on with operating frequency set by SYNC clock input. DC-DC conversion
cycles initiate on rising edge of input clock.

Detailed Description 28V. Bootstrapping is required because the MAX669

does not have undervoltage lockout, but instead drives
The MAX668/MAX669 current-mode PWM controllers
EXT with an open-loop, 50% duty-cycle start-up oscilla-
operate in a wide range of DC-DC conversion applica-
tor when LDO is below 2.5V. It switches to closed-loop
tions, including boost, SEPIC, flyback, and isolated out-
operation only when LDO exceeds 2.5V. If a non-boot-
put configurations. Optimum conversion efficiency is
strapped connection is used with the MAX669 and if
maintained over a wide range of loads by employing
VCC (the input voltage) remains below 2.7V, the output
both PWM operation and Maxim’s proprietary Idle
voltage will soar above the regulation point. Table 2
Mode control to minimize operating current at light
recommends the appropriate device for each biasing
loads. Other features include shutdown, adjustable
option.
internal operating frequency or synchronization to an
external clock, soft start, adjustable current limit, and a
wide (1.8V to 28V) input range. Table 1. MAX668/MAX669 Comparison
FEATURE MAX668 MAX669
MAX668 vs. MAX669 Differences
Differences between the MAX668 and MAX669 relate VCC Input
3V to 28V 1.8V to 28V
to their use in bootstrapped or non-bootstrapped cir- Range
cuits (Table 1). The MAX668 operates with inputs as Bootstrapped or nonboot- Must be boot-
low as 3V and can be connected in either a boot- strapped. VCC can be con- strapped (VCC
strapped or non-bootstrapped (IC powered from input Operation nected to input, output, or must be connect-
supply or other source) configuration. When not boot- other voltage source such as ed to boosted out-
strapped, the MAX668 has no restriction on output volt- a logic supply. put voltage, VOUT).
age. When bootstrapped, the output cannot exceed
Under-
28V. IC stops switching for LDO
voltage No
below 2.5V.
The MAX669 is optimized for low input voltages (down Lockout
to 1.8V) and requires bootstrapped operation (IC pow-
ered from VOUT) with output voltages no greater than When LDO is
Soft-Start Yes
above 2.5V

8 Maxim Integrated
 MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
PWM Controller Bootstrapped/Non-Bootstrapped Operation
The heart of the MAX668/MAX669 current-mode PWM Low-Dropout Regulator (LDO)
controller is a BiCMOS multi-input comparator that Several IC biasing options, including bootstrapped and
simultaneously processes the output-error signal, the non-bootstrapped operation, are made possible by an
current-sense signal, and a slope-compensation ramp on-chip, low-dropout 5V regulator. The regulator input is
(Figure 1). The main PWM comparator is direct sum- at VCC, while its output is at LDO. All MAX668/MAX669
ming, lacking a traditional error amplifier and its associ- functions, including EXT, are internally powered from
ated phase shift. The direct summing configuration LDO. The V CC -to-LDO dropout voltage is typically
approaches ideal cycle-by-cycle control over the out- 200mV (300mV max at 12mA), so that when VCC is less
put voltage since there is no conventional error amp in than 5.2V, LDO is typically VCC - 200mV. When LDO is
the feedback path. in dropout, the MAX668/MAX669 still operate with VCC
In PWM mode, the controller uses fixed-frequency, cur- as low as 3V (as long as LDO exceeds 2.7V), but with
rent-mode operation where the duty ratio is set by the reduced amplitude FET drive at EXT. The maximum
input/output voltage ratio (duty ratio = (VOUT - VIN) / VIN VCC input voltage is 28V.
in the boost configuration). The current-mode feedback LDO can supply up to 12mA to power the IC, supply
loop regulates peak inductor current as a function of gate charge through EXT to the external FET, and sup-
the output error signal. ply small external loads. When driving particularly large
At light loads the controller enters Idle Mode. During FETs at high switching rates, little or no LDO current
Idle Mode, switching pulses are provided only as need- may be available for external loads. For example, when
ed to service the load, and operating current is mini- switched at 500kHz, a large FET with 20nC gate charge
mized to provide best light-load efficiency. The requires 20nC x 500kHz, or 10mA.
minimum-current comparator threshold is 15mV, or 15% VCC and LDO allow a variety of biasing connections to
of the full-load value (IMAX) of 100mV. When the con- optimize efficiency, circuit quiescent current, and full-
troller is synchronized to an external clock, Idle Mode load start-up behavior for different input and output
occurs only at very light loads. voltage ranges. Connections are shown in Figures 2, 3,
4, and 5. The characteristics of each are outlined in
Table 1.

VCC

MAX669 ONLY LDO

1.25V
EXT LOW-VOLTAGE
LDO MUX 0
ANTISAT 1 START-UP
R1 OSCILLATOR
552k PGND (MAX669 ONLY)
UVLO MAX668
R2 MAX669
276k
REF
R3 1.25V
276k MAIN PWM
FB +A COMPARATOR
-A X6
CURRENT SENSE +C
CS+
-C X1 BIAS
SLOPE COMPENSATION SYNC/SHDN
+S X1
-S
OSC OSC
FREQ
100mV IMAX

S Q
IMIN R
15mV

Figure 1. MAX668/MAX669 Functional Diagram

Maxim Integrated 9
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
VIN = 1.8V to 12V

C1 L1

1 VOUT = 12V @ 0.5A

LDO 8
EXT N1 D1
C4 C5 C6 C8
MAX669 6
CS+
9
V+ R1 R2
C2 7
PGND
10 SYNC/
5
SHDN FB
4
REF
3 C7 R3
C3 2 GND
FREQ

R4

Figure 2. MAX669 High-Voltage Bootstrapped Configuration

VIN = 1.8V to 5V
C1
68µF L1
10V 4.7µH

1 VOUT = 5V @ 1A
LDO 8
EXT N1 D1
C2 C4 C5 C6
MBRS340T3
1µF MAX669 6 FDS6680 68µF 68µF 0.1µF
CS+
IRF7401 10V 10V
9 R1 R2
VCC
0.02Ω 75k
7 1%
PGND
10 SYNC/
SHDN 5
FB
4 R3
REF
3 C7 24.9k
C3 2 GND 220pF
FREQ 1%
0.22µF
R4
100k
1%

Figure 3. MAX669 Low-Voltage Bootstrapped Configuration

Bootstrapped Operation age range extends below 2.7V, then bootstrapped

With bootstrapped operation, the IC is powered from operation with the MAX669 is the only option.
the circuit output (V OUT ). This improves efficiency With VCC connected to VOUT, as in Figure 2, EXT volt-
when the input voltage is low, since EXT drives the FET age swing is 5V when VCC is 5.2V or more, and VCC -
with a higher gate voltage than would be available from 0.2V when VCC is less than 5.2V. If the output voltage
the low-voltage input. Higher gate voltage reduces the does not exceed 5.5V, the on-chip regulator can be
FET on-resistance, increasing efficiency. Other (unde- disabled by connecting VCC to LDO (Figure 3). This
sirable) characteristics of bootstrapped operation are eliminates the LDO forward drop and supplies maxi-
increased IC operating power (since it has a higher mum gate drive to the external FET.
operating voltage) and reduced ability to start up with
high load current at low input voltages. If the input volt-
10 Maxim Integrated
 MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
VIN = 3V to 12V
C1
68µF L1
20V 4.7µH

1 VOUT = 12V @ 1A
LDO 8
EXT N1 D1
C4 C5 C6 C8
MBRS340T3
1µF MAX668 6 68µF 68µF 0.1µF
CS+ FDS6680
20V 20V
9 R1 R2
VCC
C2 0.02Ω 218k
0.1µF 7 1%
PGND
10 SYNC/
SHDN 5
FB
4 R3
REF
3 C7 24.9k
C3 2 GND 220pF
FREQ 1%
0.22µF
R4
100k
1%

Figure 4. MAX668 High-Voltage Non-Bootstrapped Configuration

VIN = 2.7V to 5.5V

C1
68µF L1
10V 4.7µH

1 VOUT = 12V @ 1A
LDO 8
EXT N1 D1
C2 C4 C5 C6
MBRS340T3
1µF MAX668 6 68µF 68µF 0.1µF
CS+ FDS6680
20V 20V
9 R1 R2
VCC
0.02Ω 218k
7 1%
PGND
10 SYNC/
SHDN 5
FB
4 R3
REF
3 C7 24.9k
C3 2 GND 220pF
FREQ 1%
0.22µF
R4
100k
1%

Figure 5. MAX668 Low-Voltage Non-Bootstrapped Configuration

Non-Bootstrapped Operation nect to VCC. Also note that only the MAX668 can be
With non-bootstrapped operation, the IC is powered used with non-bootstrapped operation.
from the input voltage (VIN) or another source, such as If the input voltage does not exceed 5.5V, the on-chip
a logic supply. Non-bootstrapped operation (Figure 4) regulator can be disabled by connecting VCC to LDO
is recommended (but not required) for input voltages (Figure 5). This eliminates the regulator forward drop
above 5V, since the EXT amplitude (limited to 5V by and supplies the maximum gate drive to the external
LDO) at this voltage range is no higher than it would be FET for lowest on-resistance. Disabling the regulator
with bootstrapped operation. Note that non-boot- also reduces the non-bootstrapped minimum input volt-
strapped operation is required if the output voltage age from 3V to 2.7V.
exceeds 28V, since this level is too high to safely con-

Maxim Integrated 11
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Table 2. Bootstrapped and Non-Bootstrapped Configurations
INPUT OUTPUT
USE
CONFIGURATION FIGURE VOLTAGE VOLTAGE COMMENTS
WITH:
RANGE* (V) RANGE (V)

Connect VCC to VOUT. Provides maximum external

High-Voltage, Figure FET gate drive for low-voltage (Input <3V) to high-
MAX669 1.8 to 28 3V to 28
Bootstrapped 2 voltage (output >5.5V) boost circuits. VOUT cannot
exceed 28V.

Connect VOUT to VCC and LDO. Provides maxi-

Low-Voltage, Figure
MAX669 1.8 to 5.5 2.7 to 5.5 mum possible external FET gate drive for low-volt-
Bootstrapped 3
age designs, but limits VOUT to 5.5V or less.

Connect VIN to VCC. Provides widest input and out-

High-Voltage, Figure
MAX668 3 to 28 VIN to ∞ put range, but external FET gate drive is reduced for
Non-Bootstrapped 4
VIN below 5V.

Connect VIN to VCC and LDO. FET gate-drive

amplitude = VIN for logic-supply (input 3V to 5.5V) to
Low-Voltage, Figure
MAX668 2.7 to 5.5 VIN to ∞ high-voltage (output >5.5V) boost circuits. IC oper-
Non-Bootstrapped 5
ating power is less than in Figure 4, since IC current
does not pass through the LDO regulator.

Connect VCC and LDO to a separate supply

(VBIAS) that powers only the IC. FET gate-drive
Extra IC supply, Not
None MAX668 VIN to ∞ amplitude = VBIAS. Input power source (VIN) and
Non-Bootstrapped Restricted
output voltage range (VOUT) are not restricted,
except that VOUT must exceed VIN.

* For standard step-up DC-DC circuits (as in Figures 2, 3, 4, and 5), regulation cannot be maintained if VIN exceeds VOUT. SEPIC
and transformer-based circuits do not have this limitation.

In addition to the configurations shown in Table 2, the 3) If VIN is in the 3V to 4.5V range (i.e., 1-cell Li-Ion or
following guidelines may help when selecting a config- 3-cell NiMH battery range), bootstrapping VCC from
uration: VOUT, although not required, may increase overall
1) If V IN is ever below 2.7V, V CC must be boot- efficiency by increasing gate drive (and reducing
strapped to VOUT and the MAX669 must be used. If FET resistance) at the expense of quiescent power
VOUT never exceeds 5.5V, LDO may be shorted to consumption.
VCC and VOUT to eliminate the dropout voltage of 4) If VIN always exceeds 4.5V, VCC should be tied to
the LDO regulator. V IN , since bootstrapping from V OUT does not
2) If VIN is greater than 3.0V, VCC can be powered increase gate drive from EXT but does increase
from VIN, rather than from VOUT (non-bootstrapped). quiescent power dissipation.
This can save quiescent power consumption, espe-
cially when V OUT is large. If VIN never exceeds
5.5V, LDO may be shorted to VCC and VIN to elimi-
nate the dropout voltage of the LDO regulator.

12 Maxim Integrated
 MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
SYNC/SHDN and FREQ Inputs 1) Noise considerations may dictate setting (or syn-
The SYNC/SHDN pin provides both external-clock syn- chronizing) fOSC above or below a certain frequency
chronization (if desired) and shutdown control. When or band of frequencies, particularly in RF applica-
SYNC/SHDN is low, all IC functions are shut down. A tions.
logic high at SYNC/SHDN selects operation at a fre- 2) Higher frequencies allow the use of smaller value
quency set by ROSC, connected from FREQ to GND. (hence smaller size) inductors and capacitors.
The relationship between fOSC and ROSC is:
3) Higher frequencies consume more operating power
ROSC = 5 x 1010 / fOSC both to operate the IC and to charge and discharge
So a 500kHz operating frequency, for example, is set the gate of the external FET. This tends to reduce
with ROSC = 100kΩ. efficiency at light loads; however, the MAX668/
MAX669’s Idle Mode feature substantially increases
Rising clock edges on SYNC/SHDN are interpreted as
light-load efficiency.
synchronization inputs. If the sync signal is lost while
SYNC/SHDN is high, the internal oscillator takes over at 4) Higher frequencies may exhibit poorer overall effi-
the end of the last cycle and the frequency is returned ciency due to more transition losses in the FET;
to the rate set by ROSC. If sync is lost with SYNC/SHDN however, this shortcoming can often be nullified by
low, the IC waits for 70µs before shutting down. This trading some of the inductor and capacitor size
maintains output regulation even with intermittent sync benefits for lower-resistance components.
signals. When an external sync signal is used, Idle The oscillator frequency is set by a resistor, ROSC, con-
Mode switchover at the 15mV current-sense threshold nected from FREQ to GND. ROSC must be connected
is disabled so that Idle Mode only occurs at very light whether or not the part is externally synchronized ROSC
loads. Also, ROSC should be set for a frequency 15% is in each case:
below the SYNC clock rate:
ROSC = 5 x 1010 / fOSC
ROSC(SYNC) = 5 x 1010 / (0.85 x fSYNC) when not using an external clock.
Soft-Start ROSC(SYNC) = 5 x 1010 / (0.85 x fSYNC)
The MAX668/MAX669 feature a “digital” soft start which when using an external clock, fSYNC.
is preset and requires no external capacitor. Upon
start-up, the peak inductor increments from 1/5 of the
Setting the Output Voltage
The output voltage is set by two external resistors (R2
value set by RCS, to the full current-limit value, in five
and R3, Figures 2, 3, 4, and 5). First select a value for
steps over 1024 cycles of fOSC or fSYNC. For example,
R3 in the 10kΩ to 1MΩ range. R2 is then given by:
with an f OSC of 200kHz, the complete soft-start
sequence takes 5ms. See the Typical Operating R2 = R3 [(VOUT / VREF) – 1]
Characteristics for a photo of soft-start operation. Soft- where VREF is 1.25V.
start is implemented: 1) when power is first applied to
the IC, 2) when exiting shutdown with power already Determining Inductance Value
applied, and 3) when exiting undervoltage lockout. The For most MAX668/MAX669 boost designs, the inductor
MAX669’s soft-start sequence does not start until LDO value (LIDEAL) can be derived from the following equa-
reaches 2.5V. tion, which picks the optimum value for stability based
on the MAX668/MAX669’s internally set slope compen-
Design Procedure sation:
The MAX668/MAX669 can operate in a number of DC- LIDEAL = VOUT / (4 x IOUT x fOSC)
DC converter configurations including step-up, SEPIC The MAX668/MAX669 allow significant latitude in induc-
(single-ended primary inductance converter), and fly- tor selection if LIDEAL is not a convenient value. This
back. The following design discussions are limited to may happen if LIDEAL is a not a standard inductance
step-up, although SEPIC and flyback examples are (such as 10µH, 22µH, etc.), or if LIDEAL is too large to
shown in the Application Circuits section. be obtained with suitable resistance and saturation-cur-
rent rating in the desired size. Inductance values small-
Setting the Operating Frequency er than LIDEAL may be used with no adverse stability
The MAX668/MAX669 can be set to operate from effects; however, the peak-to-peak inductor current
100kHz to 500kHz. Choice of operating frequency will (ILPP) will rise as L is reduced. This has the effect of
depend on number of factors: raising the required ILPK for a given output power and
also requiring larger output capacitance to maintain a

Maxim Integrated 13
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
given output ripple. An inductance value larger than old NFETs that specify on-resistance with a gate-
LIDEAL may also be used, but output-filter capacitance source voltage (VGS) of 2.7V or less. When selecting an
must be increased by the same proportion that L has to NFET, key parameters can include:
LIDEAL. See the Capacitor Selection section for more 1) Total gate charge (Qg)
information on determining output filter values.
2) Reverse transfer capacitance or charge (CRSS)
Due the MAX668/MAX669’s high switching frequencies,
inductors with a ferrite core or equivalent are recom- 3) On-resistance (RDS(ON))
mended. Powdered iron cores are not recommended 4) Maximum drain-to-source voltage (VDS(MAX))
due to their high losses at frequencies over 50kHz. 5) Minimum threshold voltage (VTH(MIN))
Determining Peak Inductor Current At high switching rates, dynamic characteristics (para-
The peak inductor current required for a particular out- meters 1 and 2 above) that predict switching losses
put is: may have more impact on efficiency than R DS(ON),
ILPEAK = ILDC + (ILPP / 2) which predicts DC losses. Qg includes all capacitances
associated with charging the gate. In addition, this
where ILDC is the average DC input current and ILPP is parameter helps predict the current needed to drive the
the inductor peak-to-peak ripple current. The ILDC and gate at the selected operating frequency. The continu-
ILPP terms are determined as follows: ous LDO current for the FET gate is:
I (V + VD )
ILDC = OUT OUT IGATE = Qg x fOSC
(VIN – VSW ) For example, the MMFT3055L has a typical Qg of 7nC
where V D is the forward voltage drop across the (at VGS = 5V); therefore, the IGATE current at 500kHz is
Schottky rectifier diode (D1), and V SW is the drop 3.5mA. Use the FET manufacturer’s typical value for Qg
across the external FET, when on. in the above equation, since a maximum value (if sup-
plied) is usually too conservative to be of use in esti-
(VIN – VSW ) (VOUT + VD – VIN ) mating IGATE.
ILPP =
L x fOSC (VOUT + VD ) Diode Selection
where L is the inductor value. The saturation rating of The MAX668/MAX669’s high switching frequency
the selected inductor should meet or exceed the calcu- demands a high-speed rectifier. Schottky diodes are
lated value for ILPEAK, although most coil types can be recommended for most applications because of their
operated up to 20% over their saturation rating without fast recovery time and low forward voltage. Ensure that
difficulty. In addition to the saturation criteria, the induc- the diode’s average current rating is adequate using
tor should have as low a series resistance as possible. the diode manufacturer’s data, or approximate it with
For continuous inductor current, the power loss in the the following formula:
inductor resistance, PLR, is approximated by: I - I
PLR ≅ (IOUT x VOUT / VIN)2 x RL IDIODE = IOUT + LPEAK OUT
3
where RL is the inductor series resistance. Also, the diode reverse breakdown voltage must
Once the peak inductor current is selected, the current- exceed VOUT. For high output voltages (50V or above),
sense resistor (RCS) is determined by: Schottky diodes may not be practical because of this
RCS = 85mV / ILPEAK voltage requirement. In these cases, use a high-speed
silicon rectifier with adequate reverse voltage.
For high peak inductor currents (>1A), Kelvin sensing
connections should be used to connect CS+ and Capacitor Selection
PGND to RCS. PGND and GND should be tied together
Output Filter Capacitor
at the ground side of RCS.
The minimum output filter capacitance that ensures sta-
Power MOSFET Selection bility is:
The MAX668/MAX669 drive a wide variety of N-channel (7.5V x L / L IDEAL )
power MOSFETs (NFETs). Since LDO limits the EXT COUT(MIN) =
(2πRCS x VIN(MIN) x fOSC )
output gate drive to no more than 5V, a logic-level
NFET is required. Best performance, especially at low where VIN(MIN) is the minimum expected input voltage.
input voltages (below 5V), is achieved with low-thresh- Typically COUT(MIN), though sufficient for stability, will

14 Maxim Integrated
 MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
not be adequate for low output voltage ripple. Since In bootstrapped configurations with the MAX668 or
output ripple in boost DC-DC designs is dominated by MAX669, there may be circumstances where full load
capacitor equivalent series resistance (ESR), a capaci- current can only be applied after the circuit has started
tance value 2 or 3 times larger than COUT(MIN) is typi- and the output is near its set value. As the input voltage
cally needed. Low-ESR types must be used. Output drops, this limitation becomes more severe. This char-
ripple due to ESR is: acteristic of all bootstrapped designs occurs when the
VRIPPLE(ESR) = ILPEAK x ESRCOUT MOSFET gate is not fully driven until the output voltage
rises. This is problematic because a heavily loaded out-
Input Capacitor put cannot rise until the MOSFET has low on-resis-
The input capacitor (CIN) in boost designs reduces the tance. In such situations, low-threshold FETs (VTH <
current peaks drawn from the input supply and reduces VIN(MIN)) are the most effective solution. The Typical
noise injection. The value of CIN is largely determined Operating Characteristics section shows plots of start-
by the source impedance of the input supply. High up voltage versus load current for a typical boot-
source impedance requires high input capacitance, strapped design.
particularly as the input voltage falls. Since step-up DC-
DC converters act as “constant-power” loads to their Layout Considerations
input supply, input current rises as input voltage falls. Due to high current levels and fast switching waveforms
Consequently, in low-input-voltage designs, increasing that radiate noise, proper PC board layout is essential.
CIN and/or lowering its ESR can add as many as five Protect sensitive analog grounds by using a star ground
percentage points to conversion efficiency. A good configuration. Minimize ground noise by connecting
starting point is to use the same capacitance value for GND, PGND, the input bypass-capacitor ground lead,
CIN as for COUT. and the output-filter ground lead to a single point (star
ground configuration). Also, minimize trace lengths to
Bypass Capacitors reduce stray capacitance, trace resistance, and radiat-
In addition to CIN and COUT, three ceramic bypass ed noise. The trace between the external gain-setting
capacitors are also required with the MAX668/MAX669. resistors and the FB pin must be extremely short, as
Bypass REF to GND with 0.22µF or more. Bypass LDO must the trace between GND and PGND.
to GND with 1µF or more. And bypass VCC to GND with
0.1µF or more. All bypass capacitors should be located Application Circuits
as close to their respective pins as possible. Low-Voltage Boost Circuit
Figure 3 shows the MAX669 operating in a low-voltage
Compensation Capacitor boost application. The MAX669 is configured in the
Output ripple voltage due to COUT ESR affects loop bootstrapped mode to improve low input voltage per-
stability by introducing a left half-plane zero. A small formance. The IRF7401 N-channel MOSFET was select-
capacitor connected from FB to GND forms a pole with ed for Q1 in this application because of its very low
the feedback resistance that cancels the ESR zero. The 0.7V gate threshold voltage (VGS). This circuit provides
optimum compensation value is: a 5V output at greater than 2A of output current and
ESRCOUT operates with input voltages as low as 1.8V. Efficiency
CFB = COUT x is typically in the 85% to 90% range.
(R2 x R3) / (R2 + R3)
where R2 and R3 are the feedback resistors (Figures 2, +12V Boost Application
3, 4, and 5). If the calculated value for CFB results in a Figure 5 shows the MAX668 operating in a 5V to 12V
non-standard capacitance value, values from 0.5CFB to boost application. This circuit provides output currents
1.5CFB will also provide sufficient compensation. of greater than 1A at a typical efficiency of 92%. The
MAX668 is operated in non-bootstrapped mode to mini-
Applications Information mize the input supply current. This achieves maximum
light-load efficiency. If input voltages below 5V are
Starting Under Load used, the IC should be operated in bootstrapped mode
In non-bootstrapped configurations (Figures 4 and 5), to achieve best low-voltage performance.
the MAX668 can start up with any combination of out-
put load and input voltage at which it can operate when 4-Cell to +5V SEPIC Power Supply
already started. In other words, there are no special Figure 6 shows the MAX668 in a SEPIC (single-ended
limitations to start-up in non-bootstrapped circuits. primary inductance converter) configuration. This con-
figuration is useful when the input voltage can be either

Maxim Integrated 15
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
larger or smaller than the output voltage, such as when Isolated +5V to +5V Power Supply
converting four NiMH, NiCd, or Alkaline cells to a 5V The circuit of Figure 7 provides a 5V isolated output at
output. The SEPIC configuration is often a good choice 400mA from a 5V input power supply. Transformer T1
for combined step-up/step-down applications. provides electrical isolation for the forward path of the
The N-channel MOSFET (Q1) must be selected to with- converter, while the TLV431 shunt regulator and
stand a drain-to-source voltage (VDS) greater than the MOC211 opto-isolator provide an isolated feedback
sum of the input and output voltages. The coupling error voltage for the converter. The output voltage is set
capacitor (C2) must be a low-ESR type to achieve max- by resistors R2 and R3 such that the mid-point of the
imum efficiency. C2 must also be able to handle high divider is 1.24V (threshold of TLV431). Output voltage
ripple currents; ordinary tantalum capacitors should not can be adjusted from 1.24V to 6V by selecting the
be used for high-current designs. proper ratio for R2 and R3. For output voltages greater
than 6V, substitute the TL431 for the TLV431, and use
The circuit in Figure 6 provides greater than 1A output 2.5V as the voltage at the midpoint of the voltage-
current at 5V when operating with an input voltage from divider.
3V to 25V. Efficiency will typically be between 70% and
85%, depending upon the input voltage and output cur-
rent.

VIN
3V to 25V

22µF x 3
@ 35V 4.9µH L1
CTX5-4
D1
40V
9 10 VOUT
VCC SHDN 5V @ 1A
1 C2
LDO 10µF @ 35V
C3
2 Q1 68µF x 3
FREQ MAX668
8 30V
EXT
FDS6680
1µF 4
R3 REF
100k 6
CS+
0.22µF
5
FB R4 R1
0.02Ω 75k
GND PGND
3 7

C4 R2
520pF 25k
D1: MBR5340T3, 3A, 40V SCHOTTKY DIODE
R4: WSL-2512-R020F, 0.02Ω
C3: AVX TPSZ686M020R0150, 68µF, 150mΩ ESR

Figure 6. MAX668 in SEPIC Configuration

16 Maxim Integrated
 MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX

MBR0540L 47µH
VIN = +5V +5V @ 400mA

220µF T1 220µF
1µF
10V 1:2 MBR0540L 10V

LDO VCC +5V RETURN

EXT IRF7603
SHDN

CS+
MAX668
FB
0.1Ω
PGND

REF FREQ GND

0.22µF
100k

R2
510Ω 301k
MOC211 1%

10k

0.1µF

0.068µF 610Ω TLV431

R3
100k
1%
T1: COILTRONICS CTX03-14232

Figure 7. Isolated +5V to +5V at 400mA Power Supply

Package Information
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a "+", "#", or
"-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.

PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.

10 µMAX U10-2 21-0061 90-0330

Maxim Integrated 17
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Revision History
REVISION REVISION PAGES
DESCRIPTION
NUMBER DATE CHANGED
Added automotive qualified part and updated lead-free and leaded soldering
2 1/12 1, 2
temperatures

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
18 Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
© Maxim Integrated The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.