lIC notes-1-41
lIC notes-1-41
lIC notes-1-41
UNIT I
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Explanation:
A constant current source uses the transistor in the active mode of operation.
The c o l l e c t o r c u r r e n t is independent of t h e c o l l e c t o r v ol t a ge .
Transistors Q1&Q2 are matched.
The circuit is fabricated using IC technology.
Base and emitter of Q1& Q2 are tied together and have the same VBE.
Since Q2 is identical to Q1, the emitter current of Q2 will be equal to emitter current of Q1 which is
approximately equal to Iref.
As l o n g a s Q2 i s m a i n t a i n e d in t h e a c t i v e r e g i o n , its c o l l e c t o r c u r r e n t
IC2= Iout will b e approximately equal to Iref.
Since the output current Io is a reflection or mirror of the reference current Iref, the circuit is often
referred to as a current mirror.
Analysis:
If the effect of finite β is considered, this may lead to an output current not equal to the input reference
current, since
where the expression for IREF is found by using KCL at the collector of Q1.
Disadvantage:
The output resistance of the current mirror is limited by the ro of Q2,
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1.2 CURRENT SOURCES
Current Source:
Definition:
A circuit which generates current is known as current source.
Types of current sources:
1. Widlar current source
2. Wilson current source
1. Widlar Current Source
Q. Draw the circuit of widlar current source and derive an expression for its output current. [May 2006,
Nov 2007, May 2008, Nov 2008]
Circuit Diagram:
Explanation:
In the Widlar current source, resistor (R2) is added to the emitter circuit of transistor Q2.
Since multistage amplifier systems have high gain, bias currents must be small.
The Widlar current source generates small constant currents using relatively small resistors.
Analysis:
Assuming we have matched devices, VT and IO are the same for Q1 and Q2.
Subtracting VBE2 from VBE1, and using the appropriate property of logarithms (i.e., lnA-lnB=ln(A/B)),
Since IREF (=IC1) is usually defined in design can be solved for the required value of R2.
2. Wilson Current Source
Q. With neat diagram explain Wilson current source. [Nov 2009]
Circuit Diagram
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Explanation:
Another current source configuration that possesses increased output resistance is the Wilson current
source.
The increased ro of the Wilson current source is due to the negative feedback provided by Q3.
It provides an output current Io which is very nearly equal to Vref and also exhibits a very high output
resistance.
Analysis:
Writing a KCL equation at the emitter of Q2
If all three transistors are matched VBE1=VBE2=VBE3, β1=β2=β3, IB1=IB3, and IC1=IC3.
Solving for IC2, we get an expression for the output current (IC2) in terms of the transistor parameter
β and the input current, IREF
For reasonable values of β, the second term will be negligible and IC2=Iout=IREF.
Therefore, in addition to the increased output resistance, the Wilson configuration provides an output
that is almost independent of the internal transistor characteristics.
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1.3. CURRENT SOURCES AS ACTIVE LOADS
The current source can be used as an active load in both analog and digital IC‘s.
The active load realized using current source in place of the passive load (i.e. a resistor) in the collector arm
of differential amplifier.
The active load used to achieve high voltage gain without requiring large power supply voltage.
A voltage source is a circuit that produces an output voltage V0, which is independent of the load.
Methods:
There are four methods used to produce a voltage source, namely,
1. Voltage source circuit using Impedance transformation:
2. Emitter– follower or Common Collector Type Voltage source:
3. Voltage source using breakdown voltage of the base- emitter junction
4. Voltage Source using VBE as a reference:
1. Voltage source circuit using Impedance transformation:
Circuit Diagram:
Explanation:
The voltage source circuit using the impedance transforming property of the transistor is shown in figure.
The source voltage Vs drives the base of the transistor through a series resistance RS.
The output is taken across the emitter.
From the circuit, the output ac resistance looking into emitter is given by
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Equation is applicable only for small changes in the output current.
The load regulation parameter indicates the changes in Vo resulting from large changes in output
current Io.
Reduction in Vo occurs as Io goes from no-load current to full-load current and this factor determines the
output impedance of the voltage sources.
2.Emitter– follower or Common Collector Type Voltage source:
Circuit Diagram:
Explanation:
The figure shows an emitter follower or common collector type voltage source.
This voltage source is suitable for the differential gain stage used in op-amps.
The low output impedance of the common-collector stage simulates a low impedance voltage source with
an output voltage level of Vo represented by
The diode D1 is used for offsetting the effect of dc value VBE , across the E-B junction of the
transistor.
The load ZL shown in dotted line represents the circuit biased by the current through Q1.
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The impedance R0 looking into the emitter of Q1 derived from the hybrid π model is given by
The voltage source using common collector stage has the limitations of its weakness for changes in bias
voltage VN.
The output voltage Vo with respect to changes in supply voltage Vcc.
This is overcome in the voltage source circuit using the breakdown voltage of the base- emitter junction.
The emitter – follower stage of common – collector is eliminated in this circuit, since the impedance seen
looking into the bias terminal N is very low.
The current source I1 is normally simulated by a resistor connected between Vcc and node n.
Then, the output voltage level V0 at node N is given by V0 = VB +VBE Where VB is the breakdown
voltage of diode DB and VBE is the diode drop across D1.
The breakdown diode D B is normally realized using the base-emitter junction of the transistor.
The diode D1 provides partial compensation for the positive temperature coefficient effect of VB.
In a monolithic IC structure, DB and D1 can be conveniently realized as a single transistor with two
individual emitters as shown in figure.
Advantages:
1. Producing low ac impedance and
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The output resistance R0 looking into the output terminal in figure is given by
Ro=RB+VT/ I1
where RB and VT / I1 are the ac resistances of the base–emitter resistance of diode DB and D1
respectively.
Typically, RB is in the range of 40Ω to 100Ω, and V0 in the range of 6.5V to 9V.
Hence, the voltage V0 can be any multiple of VBE by properly selecting the resistors R1 and R2.
Due to the shunt feedback provided by R1, the transistor current I1 automatically adjusts itself, towards
maintaining I2 and V0 relatively independent of the changes in supply voltage.
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The ac output resistance of the circuit R0 is given by,
Definition:
The circuit that is designed for providing a constant voltage independent of changes in temperature
is called a voltage reference.
Concepts:
The most important characteristic of a voltage reference is the temperature coefficient reference voltage
TCR, and it is expressed as
Reference voltage must have good power supply rejection which is as independent of the supply
voltage.
Output voltage must be as independent of the loading of output current.
The circuit should have low output impedance.
The voltage reference circuit is used to bias the voltage source circuit, and the combination can be called
as the voltage regulator.
The basic design strategy is producing a zero TCR at a given temperature, and thereby achieving good
thermal ability.
Temperature stability of the order of 100ppm/0C is typically expected.
Methods:
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1. Voltage Reference circuit using temperature compensation scheme:
Circuit Diagram:
Explanation:
This design utilizes the close thermal coupling achievable among the monolithic components.
This technique compensates the known thermal drifts by introducing an opposing and compensating drift
source of equal magnitude.
A constant current I is supplied to the avalanche diode DB and it provides a bias voltage of VB t o the base
of Q1.
The temperature dependence of the VBE drop across Q1 and those across D1 and D2 results in
respective temperature coefficients.
Hence, with the use of resistors R1 and R2 with tapping across them at point N compensates for the
temperature drifts in the base- emitter loop of Q1.
This results in generating a voltage reference VR with normally zero temperature coefficient.
2. Voltage Reference circuit using Avalanche Diode Reference:
Circuit Diagram
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Explanation:
A voltage reference can be implemented using the breakdown phenomenon condition of a heavily doped
PN junction.
The Zener breakdown is the main mechanism for junctions, which breakdown at a voltage of 5V or less.
For integrated transistors, the base-emitter breakdown voltage falls in the range of 6 to 8V.
Therefore, the breakdown in the junctions of the integrated transistor is primarily due to avalanche
multiplication.
The avalanche breakdown voltage V B of a transistor incurs a positive temperature coefficient,
typically in the range of 2mV/0 C to 5mV/0C.
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The base bias for transistor Q1 is provided through register R1 and it also provides the dc current
needed to bias DB, D1 and D2.
The voltage at the base of Q1 is equal to the Zener voltage VB added with two diode drops due to
D1 and D2.
The voltage across R2 is equal to the voltage at the base of Q1 less the sum of the base – emitter
voltages of Q1 and Q2.
Hence, the voltage across R2 is approximately equal to that across DB = VB. Since Q2 and Q3 act as a
current mirror circuit, current I0 equals the current through R2.
It shows that, the output current Io has low temperature coefficient, if the temperature coefficient of R2 is
low, such as that produced by a diffused resistor in IC fabrication.
The zero temperature coefficients for output current can be achieved, if diodes are added in series with R2,
so that they can compensate for the temperature variation of R2 and VB.
The temperature compensated avalanche diode reference source circuit is shown in figure.
The transistor Q4 and Q5 form an active load current mirror circuit. The base voltage of Q1 is the
voltage VB across Zener DB.
Then, VB = (VBE * n) +VBE across Q1 + VBE across Q2 + drop across R2. Here, n is the number of
diodes.
It can be expressed as
Differentiating for VB, I0, R2 and VBE partially, with respect to temperature T, we get
Therefore, zero temperature coefficient of I0 can be obtained, if the above condition is satisfied.
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1.6. DIFFERENTIAL AMPLIFIER
Q.Explain the operation of basic differential amplifier. [May 2005]
Definition:
An amplifier that is used to amplify the difference between two signals is known as differential
amplifier.
1. Excellent stability
Advantages
1. Lower cost
2. Easier fabrication as IC component and closely matched components.
Block Diagram:
The above figure shows the basic block diagram of a differential amplifier, with two input terminals and
one output terminal.
The output signal of the differential amplifier is proportional to the difference between the two input
signals. V0 = Adm (V1 – V2 )
If V1 = V2, then the differential mode input signal is zero and common mode input signal is Vcm = V1 =V2.
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1.6.1. DIFFERENTIAL AMPLIFIER WITH ACTIVE LOAD:
Q.Draw the circuit of a differential amplifier with current mirror load. Drive an expression for its gain.
(May 2007, Dec 2018, May 2018) [Nov/Dec 2022]
Differential amplifier is designed with active loads to increase the differential mode voltage gain.
This is got by cascading the gain stages which increase the phase shift.
Limitations in IC fabrication
2. For large RC, the quiescent drop across the resistor increased.
3. A large power supply will be required to maintain a given operating current.
4. Large monolithic resistor introduces large parasitic capacitances which limits the frequency response of
the amplifier.
5. For linear operation of the differential pair, the devices should not be allowed to enter into saturation.
This limits the max input voltage that can be applied to the bases of transistors Q1 and Q2 the base-
collector junction must be allowed to become forward-biased by more than 0.5V.
The large value of load resistance produces a large dc voltage drop (IEE / 2) Rc, so that the collector
voltage will be VC=Vcc - (IEE/2) RC and it will be substantially less than the supply voltage Vcc.
This will reduce the input voltage range of the differential amplifier.
Due to the reasons cited above, an active load is preferred in the differential amplifier configurations.
A simple active load circuit for a differential amplifier is the current mirror active load as shown in
figure.
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The active load comprises of transistors Q3 and Q4 with the transistor Q3 connected as a Diode with its
base and collector shorted. The circuit is shown to drive a load RL.
When an ac input voltage is applied to the differential amplifier, the various currents of the circuit are
given by IC4 = IC3 = IC1 = gmVid/2, where IC4 = IC3 due to current mirror action. IC2 = - gmVid/2 .
We know that the load current IL entering the next stage is
IL= IC2-IC4 = - gmVid/2 - gmVid/2 = - gmVid
Then, the output voltage from the differential amplifier is given by V0= - ILRL = gm RLVid.
It provides single-ended output with a ground reference since the load RL is connected to only one
output terminal.
This is made possible by the use of the current mirror active load.
The output resistance Ro of the circuit is that offered by the parallel combination of transistors Q2
(NPN) and Q4 (PNP). It is given by Rr = ro2 || ro4
Analysis of BJT differential amplifier with active load:
The collector currents of all the transistors are equal. IC1 = IC2 = IC3 =IC4 = IEE/2 .
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The Collector -emitter voltages of Q1 and Q2 are given by
VCE1-VCE2 =VC-VE=V CC - VEB-(-VEB)= VCC
Equation shows that, the offset is higher than that of a resistive loaded differential amplifier A.
This can be reduced by the use of emitter resistors for Q 3 and Q 4 , and a transistor Q5 in the current
mirror load.
Common Mode Rejection Ratio (CMRR)
CMRR is defined as the ratio of differential mode gain to the common mode gain.
The common mode rejection ratio is a measure of the differential amplifier’s ability to reject the
common mode signal and amplify the differential mode signal.
Thus, the larger the input trans conductance or REE, the larger the common mode rejection ratio.
Input common-mode range (ICMR)
The input common-mode range is the range of common-mode voltages over which the differential
amplifier continues to sense and amplify the difference signal with the same gain.
Typically, the ICMR is defined by the common-mode voltage range over which all MOSFETs remain in the
saturation region and all BJTs remain in the active region.
Output offset voltage ( VOS(out))
The output offset voltage is the voltage which appears at the output of the differential amplifier when the
input terminals are connected together.
Input offset voltage ( VOS(in) = VOS)
The input offset voltage is equal to the output offset voltage divided by the differential voltage gain.
Symbol:
Pin Configuration:
Ideal characteristics of O P A M P
4. Bandwidth infinite
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Output Impedance Zout 0Ω 10-100 Ω
Output Voltage Vout Depends only on Depends slightly on
Vd = (V+−V−) Differential mode average input Vc = (V++V−)/2
signal Common- Mode signal
CMRR ∝ 10-100dB
1. Input stage:
The input stage, or differential amplifier, provides the common-mode rejection to op-amp operation.
The intermediate stages are shown as the voltage gain stage and the level shifter in the figure above.
The voltage gain stage usually consists of one or more CE amplifiers to provide the bulk of the overall
voltage gain.
Linear operational amplifiers are direct coupled to eliminate the need for coupling capacitors that are too
large to be placed on an IC chip.
The level shifter stage may be one or more level shifters that are included to ensure that there is no dc
offset in the output signal.
In addition, these intermediate stages may be used to convert the signal from differential (double-
ended) mode to single-ended mode.
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3. Output stage:
The output stage, or power output stage, also serves a dual purpose.
It must supply the current required by the load without dissipating too much power in the output
transistors.
The output stage should provide a low output impedance to allow coupling to a low impedance load
without loss of gain.
The variation in operating frequency will cause variations in gain magnitude and its phase angle.
The ga i n of the op-amp responds to di ffe re n t frequencies is called the frequency response.
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Op-amp should have an infinite bandwidth BW =∞.
If its open loop gain in 90dB with dc signal, its gain should remain the same 90 dB through audio and
onto high radio frequency.
The op-amp gain decreases (roll-off) at higher frequency.
There is a capacitive component in the equivalent circuit of the op-amp, decrease gain after a certain
frequency reached.
For an op-amp with only one break (corner) frequency, all the capacitors effects can be represented by a
single capacitor C.
Variation of the low frequency model with capacitor C at the output is shown in fig.
2. At frequency f = f1, the gain in 3 dB down from the dc value of AOL in db.
This frequency f1 is called corner frequency.
3. For f>> f1, the fain roll-off at the rate off -20dB/decade or -6dB/decade.
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Frequency response of op amp
2. Circuit Stability:
Q. Explain various stability criteria of op-amp. [Nov 2006]
A circuit or a group of circuit connected together as a system is said to be stable, if its output
reaches a fixed value in a finite time.
A system is said to be unstable, if its output increases with time instead of achieving a fixed value.
Bode plots are compared of magnitude Vs Frequency and phase angle Vs frequency.
Any system whose stability is to be determined can represented by the block diagram.
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Feedback loop system
The block between the output and input is referred to as forward block.
The block between the output signal and feedback signal is referred to as feedback block.
The content of each block is referred as transfer frequency.
AOL (f) = V0 /Vin if Vf = 0 ----- (1)
The closed loop gain Af is given by AF = V0 /Vin = AOL / (1+(AOL ) (B) ----(2)
Once the magnitude Vs frequency and phase angle Vs frequency plots are drawn, system stability may
be determined as follows
Method 1:
Determine the phase angle when the magnitude of (AOL) (B) is 0dB (or) 1.
If phase angle is >-180, the system is stable.
However, some systems the magnitude may never be 0, in that cases method 2, must be used.
Method 2:
Determine the phase angle when the magnitude of (AOL) (B) is 0dB (or) 1.
If phase angle is > - 180, the magnitude is –ve decibels then the system is stable.
However, some systems the phase angle of a system may reach -1800, under such conditions method
1 must be used to determine the system stability.
3.Slew Rate:
Q. Define slew rate and describe the methods to improve slew rate. [Nov 2005, 08, 2009, May 2009,
Dec 2018]
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The slew rate is defined as the maximum rate of change of output voltage caused by a step input
voltage.
An ideal slew rate is infinite.
Slew rate is the maximum rate of change of output voltage with respect to time.
It is specified in V/μs.
Reason for Slew rate:
The rate at which the volt across the capacitor increases is given by
dVc/dt = I/C --------(1)
1. External compensation
2. Internal compensation
1.11.DC CHARACTERISTICS OF AN OP-AMP
Q. Explain the DC characteristics of op-amp.
Input bias current IB is defined as the average value of the base currents entering into terminal of an op-
amp.
IB= (IB+ + IB- ) / 2
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2.Input offset current
The difference between the bias currents at the input terminals of the op- amp is called as input offset current.
IOS= IB+ - IB-
The input terminals conduct a small value of dc current to bias the input transistors. Since the input
transistors cannot be made identical, there exists a difference in bias currents
A small voltage applied to the input terminals to make the output voltage as zero when the two input
terminals are grounded is called input offset voltage
4. Thermal drift
Bias current, offset current and offset voltage change with temperature.
A circuit carefully nulled at 25oc may not remain so when the temperature rises to 35oc. This is
called drift.
1.12. OPEN LOOP OP-AMP CONFIGURATION
Q. Explain the open loop configuration of op-amp with example circuits. (Nov 2016)
The term open-loop indicates that no feedback in any form is fed to the input from the output.
When connected in open – loop, the op-amp functions as a very high gain amplifier.
There are three open – loop configurations of op-amp namely,
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1. Differential amplifier
2. Inverting amplifier
3. Non-inverting amplifier
The above classification is made based on the number of inputs used and the terminal to which the
input is applied.
The op-amp amplifies both ac and dc input signals.
Thus, the input signals can be either ac or dc voltage.
1. Differential Amplifier:
In t h i s c o n f i g u r a t i o n , t h e i n p u t s a r e a p p l i e d t o b o t h t h e i n v e r t i n g a n d t h e n o n -
inverting input terminals of the op-amp.
It amplifies the difference between the two input voltages.
The source resistance Ri1and Ri2 are negligibly small in comparison with the very high input resistance
offered by the op-amp.
Thus the voltage drop across these source resistances is assumed to be zero.
In this configuration, the input signal is applied to the inverting input terminal of the op - amp and the
non-inverting input terminal is connected to the ground.
Figure shows the circuit of an open loop inverting amplifier.
The output voltage is 180 out of phase with respect to the input.
Hence, the output voltage V0 is given by,
V0 = -AVi.
Thus, in an inverting amplifier, the input signal is amplified by the open-loop gain A and in phase shifted
by 180 0.
3.Non-inverting Amplifier:
The input signal is amplified by the open – loop gain A and the output is in-phase with input signal.
V0 = AVi
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Limitations of Open – loop Op – amp configuration:
In the open – loop configurations, clipping of the output waveform can occur when the output
voltage exceeds the saturation level of op-amp.
This is due to the very high open – loop gain of the op-amp.
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The required conditions to apply virtual short for op-amp circuit:
Voltage gain is negative: Input and output signals are out of phase
Closed loop gain depends entirely on external passive components (independent of op-amp gain)
Close loop amplifier trades gain (high open loop gain) for accuracy (finite but accurate closed loop
gain)
For high input closed loop impedance, R1 should be large, but is limited to provide sufficient G
In general, the inverting configuration suffers from a low input impedance
Output impedance: Ro = 0
Output is fed back to the inverting input terminal Input signal is applied from the noninverting terminal.
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The required conditions to apply virtual short for op‐ amp circuit:
Negative feedback configuration
Infinite open loop gain
Closed loop gain depends entirely on external passive components (independent of op amp gain)
Close loop amplifier trades gain (high open loop gain) for accuracy (finite but accurate closed loop gain)
Output impedance: Ro = 0
An integrated circuit (IC) is a miniature, low cost electronic circuit consisting of active and
passive components fabricated together on a single crystal of silicon. The active components are
transistors and diodes and passive components are resistors and capacitors.
2. Mention the advantages of integrated circuits.
Matched devices.
3. Define Current mirror circuit & List out its advantages. (or) What is current mirror?
[April/May 2010, Nov/Dec 2011]
A circuit in which the output current is equal to input current is called current mirror
circuit. In current mirror circuit, the output current is the mirror image of the input current.
Advantages:
a. High CMRR
b. Easy to design
4. Draw the current mirror circuit.
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5. Give the basic concept of current source.
A constant current source makes use of the fact that for a transistor in the active mode of
operation, the collector current is relatively independent of collector voltage.
ii. As an active load to provide high a.c.resistance without disturbing the d.c conditions.
The limitation of current mirror circuit is whenever we need low value of current, the value of
resistance is high and it cannot be fabricated economically in IC circuits
8. Justify the reasons for using current sources in integrated circuits.
2. More economical than resistors in terms of die area required providing bias currents of small value.
3. When used as load element, the high incremental resistance of current source results in high voltage
gains at low supply voltages.
9. What is the advantage of widlar current source over constant current source?
Using constant current source, the output current of small magnitude (microamp range) is not
attainable due to the limitations in chip area. Widlar current source is useful for obtaining small output
currents. Sensitivity of widlar current source is less compared to constant current source.
10. Mention the advantages of Wilson current source.
A voltage source is a circuit that produces an output voltage (V0), which is independent of the load
driven by the voltage source or the output current supplied to the load.
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12. Give advantages of emitter follower voltage source.
13. Write the limitation of emitter follower or common collector voltage source.
Emitter follower voltage source is weak and without protection for changes in bias voltage and the
output voltage with respect to changes in supply voltage.
The circuit that is designed for providing a constant voltage independent of changes in temperature
is called a voltage references.
15. Define temperature coefficient.
Temperature coefficient is the measure of the ability of the circuit to maintain the standard output
voltage under varying temperature conditions.
TC(Vo) = dVo/ dT in mV/o C
ii. It must have good power supply rejection which is independent of the supply voltage.
i. Line regulation
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18. Define line regulation.
Line regulation is defined as the ratio of change in output voltage to the change in input voltage.
Load regulation is defined as the ratio of change in output voltage to the change in load current. Load
regulation = ∆Vo/∆IL
Where ∆Vo – changes in the output line voltage
The ability of the circuit to maintain the output voltage constant with respect to time is given by
the parameter long term stability. It is measured in ppm/1000 hours.
The ability of the circuit to reject input ripples and an indication of how much ripples are present at
the output due to input is given by the factor RRR.It is defined as RRR = 20 log10[Vri/Vro] Where Vri - Input
ripple and Vro –Output ripple
22. What are the limitations in a temperature compensated zener-reference source?
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25. What are the properties of differential amplifier?
i. Excellent stability
1. Lower cost
2. IC fabrication is easy
Differential gain is defined as the ratio of the output voltage to the difference voltage.
Ad = Vo /Vd ,
28. Why are active loads preferred than passive loads in the input stage of an operational amplifier?
[Nov /Dec 2010] [Nov/Dec 2022]
Differential amplifier designed with active load to increase the CMRR. The gain increased
by using large value of collector resistances. If the collector resistance is large then limitation in IC
fabrications are large chip area and large bias voltage need.
29. Define CMRR. [May/June 2004, Nov/Dec 2005, Nov/Dec 2009, Nov/Dec 2010]
The common Mode Rejection ratio (CMRR) is defined as the ration of difference modegain to the
common mode gain
CMRR = |ADM/ACM|
The main draw backs are: It requires large chip area. For larger RC quiescent drop, a large power
supply will be required to maintain a given quiescent collector current.
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31. What is active load? Where it is used and why?
The requirement to increase the gain is same that the collector resistance (RC) should not disturb d.c
conditions while it must provide large resistance for a.c purposes. The current mirror which has very low d.c
resistance (dV/dI) and higher a.c resistance (dv/di) can be used as a collector load instead of RC. Such a load
is called as active load.
32. What is an operational amplifier? [Nov/Dec 2005]
An operational amplifier is a direct-coupled, high gain amplifier consisting of one or more differential
amplifier. By properly selecting the external components, it can be used to perform a variety of mathematical
operations.
Dual-in-line package.
34. List out the ideal characteristics, and draw the equivalent diagram of an OP-AMP Mention any four
important characteristics of ideal operational amplifier. [May/June2003, May/June2009,
Nov/Dec2010]
The Ideal characteristics of op-amp are:
Bandwidth is infinity.
Zero offset
Infinite CMRR
PSRR = 0
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35. Draw the circuit symbol for op-amp.
A virtual ground is a ground which acts like a ground. It may not have physical connection to ground.
This property of an ideal op-amp indicates that the inverting and non-inverting terminals of op-amp are at
the same potentials. The non-inverting input is grounded for the inverting amplifier circuit. This means that
the inverting input of the op-amp is also at ground potential.
37. Draw the equivalent diagram of an OP-AMP. (May 2018)
a. Input stage
b. Gain stage
c. Output stage
39. What are the requirements of the input stage of an op-amp?[May/June 2010]
The differential amplifier eliminates the need for an emitter bye-pass capacitor. So, differential amplifier is
used as an input stage in op-amp ICs
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40. In what way 741S is better than 741? [Nov/Dec2003]
41. Why is IC741 op-amp not used for high frequency applications?
Op-amp IC741 has very low slew rate and therefore cannot be used for high frequency applications
42. Define Input bias current. [May/June 2009]
Input bias current IB is the average of the currents that flow into the inverting and non- inverting
input terminals of the op-amp.
i.e. IB = (IB1+IB2)/2
The algebraic difference between the current into the inverting and non-inverting terminals is
referred to as input offset current Iio. Mathematically it is represented as Iios= |IB+ - IB- |
Where I B+ is the current into the non-inverting input terminals.
Input offset voltage is the voltage required to be amplified at the input for making output voltage to
zero volts.
45. Determine the slew rate of the op-amp. Or Define slew rate. (May/June2003, Nov/Dec2010,
Nov/Dec2011, May/June 2008]
Slew rate can be defined as the maximum rate of change of output voltage of op-amp with respect to
time. It is expressed as S = (dVo / dt) max in V/Sec.Where slew rate S = 2П f Vm in V/Sec.
46. What is a compensating network?
The networks formed by components such as resistors and capacitors for modifying the rate of
change of gain and the phase shift is called as compensating network
47. When are the internally compensating systems used?
In applications where the op-0amp is required to amplify relatively slow changing signals and does not
require good high frequency response, internally compensating systems are used.
48. In response to a square wave input, the output of an op-amp changed from -3V to +3V over a
time interval of 0.25μs, find slew rate. (May ’06)
Slew rate= ΔVo/Δt = 6/0.25=24 V/µs.
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49. List the types of frequency compensation.
4. Thermal drift.
1. Frequency response
2. Stability of an op-amp,
3. Frequency compensation
4. Slew rate.
Frequency compensation is needed when large bandwidth and lower closed loop gain is
desired. Compensating networks are used to control the phase shift and hence to improve the stability.
53. What are the merits of Dominant-pole compensation?
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54. What is the maximum undistorted amplitude, that a sine wave input of 10 KHz, can produce, at the
output of an op-amp whose slew rate is 0.5V/µs? (Nov ’12)
Given F=10KHZ and slew rate (S) = 0.5V/µs
Solution: Slew rate (S) = 2πfVm V/ µs.
Maximum amplitude (Vm) = S/2πf =7.92V
55. The op-amp has a gain of 12 million. Express the gain in dB.(Nov ’03)
Gain in dB=20log(gain)
20 log(20*106)= 141.6dB
56. What is the need for frequency compensation in practical op-amps?
Frequency compensation is needed when large bandwidth and lower closed loop gain is desired.
Compensating networks are used to control the phase shift and hence to improve the stability.
57. Why open loop op-amp configurations are not used in linear applications?
a. The open loop gain of the op-amp is very high. Therefore, only the smaller signals having low
frequency may be amplified accurately without distortion.
b. Open loop Voltage gain of the op-amp is not a constant voltage gain varies with changes in temperature and
power supply as well as mass production techniques. This makes op-amp unsuitable for many linear
applications
c. Bandwidth of most open loop op-amps is negligibly small or almost zero therefore op-amp is impractical in
ac applications.
58. In practical op-amps, what is the effect of high frequency on its performance?
The open-loop gain of op-amp decreases at higher frequencies due to the presence of parasitic
capacitance. The closed-loop gain increases at higher frequencies and leads to instability.
59. What are the advantages of negative feedback?
6. It reduces the effect of temperature, power supply on the gain of the circuit.
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60. Define Differential Mode gain. (Dec 2018)
Gain of an amplifier is defined as VOUT/VIN. For the special case of a differential amplifier, the
input VIN is the difference between its two input terminals, which is equal to (V1-V2) as shown in the following
diagram.
61. What are the two methods can be used to produce voltage sources? (May 2018)
There are two methods used to produce a voltage source, namely,
For an ideal operational amplifier, time delay is negligible. Hence it has an infinite slew rate. That
means it can provide output voltage simultaneously with the input voltage changes.
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