Scribd
Upload
15 views12 pages

Week 3, Lecture 2

The document covers the fundamentals of Analog CMOS Circuit Design, focusing on MOSFET small signal models and single-stage common-source amplifiers. It outlines the steps for small-signal analysis, including DC analysis and the calculation of small-signal parameters. Additionally, it discusses the impact of gain on circuit nonlinearity and the importance of load impedance in achieving desired voltage gain.

Uploaded by

abhinav24162
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
15 views12 pages

Week 3, Lecture 2

The document covers the fundamentals of Analog CMOS Circuit Design, focusing on MOSFET small signal models and single-stage common-source amplifiers. It outlines the steps for small-signal analysis, including DC analysis and the calculation of small-signal parameters. Additionally, it discusses the impact of gain on circuit nonlinearity and the importance of load impedance in achieving desired voltage gain.

Uploaded by

abhinav24162
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 12

W3-L2

Analog CMOS Circuit Design

 MOSFET Small Signal Models and Analysis


 Single-Stage Common-Source Amplifiers

1
Announcements

Assignment 1: 2nd September 2024


Quiz 1: On or Before 13th September 2024
Assignment 2: 20th September 2024

2
Small Signal Models

(a) Basic model (b) Inclusion of dependence of current (ID) on VDS

If channel length modulation is considered:

3
MOSFET Small Signal Analysis Steps
Step 1: Complete a D.C. Analysis

Turn off all small-signal sources, and then complete a circuit analysis with the remaining
D.C. sources only

“turnoff” a voltage source (e.g., (t) = 0), it becomes a short circuit.

“turnoff” a current source (e.g., ( ) = 0), it becomes an open circuit

Large capacitors become open circuit at DC.

The goal of the DC analysis is to determine:

1) The DC voltage for each MOSFET.

2) The DC voltage for each MOSFET (you need this value for the CHECK).

Step 2: Calculate the small-signal circuit parameters for each MOSFET.

4
MOSFET Small Signal Analysis Steps
Step 3: Carefully replace all MOSFETs with their small-signal circuit models.

Step 4: Set all D.C. sources to zero.

• A zero voltage DC source is a short.


• A zero current DC source is an open.
• Replace the large capacitors with a (AC) short.

Step 5: Analyze the small-signal circuit. For PMOS: <

• Voltage gain < −


• Input impedance
• Output impedance Q. Draw the small-signal model for PMOS

5
Single Stage MOS Amplifiers
1. Common-Source Stage with Resistive Load

Input-output characteristics or transfer characteristics

If the input voltage increases from zero, M1 is off and Vout = VDD

≥ M1 is in saturation region

Why? Because Vout decreases when Vin increases. For saturation > −

When < −
6
Example -1
Perform a small-signal analysis to determine the small-signal open-circuit voltage gain =
( )/ ( ). Consider no channel length modulation.

Step 1:

ID = ? VDS = ?

Step 2:
gm = ? ro = ? 7
Example -1
ID = 1 mA, VDS = 10 V VGS = 4 V VT = 2 V

gm = 1 mA/V ro = ꝏ

Step 3 and 4:

Step 5:

From KVL, Vgs = Vin Av = -5


8
Single Stage MOS Amplifiers
1. Common-Source Stage with Resistive Load

Input-output characteristics or transfer characteristics


HW: Express Vo for different
values of Vi

9
Common-Source Stage with Resistive Load
Gain: Av=-gmRD

Input and Output Impedances

Observations and Discussions:


• gm changes substantially if the input signal is large → if the gain changes
significantly with the signal swing then the circuit operates in large signal mode.
• The dependence of the gain (Av) upon the signal level leads to nonlinearity →
undesirable condition.
• To minimize the nonlinearity, the gain (Av) should be a weak function of gm →
design and layout of amplifier circuit critical.
10
CS Stage with Current-Source Load
In applications requiring a large voltage gain in a single stage, the relationship Av =
−gmRD suggests that we should increase the load impedance of the CS stage. With a
resistor or diode-connected load, however, increasing the load resistance translates to
a large dc drop across the load, thereby limiting the output voltage swing.

As long as a MOS transistor is in saturation region and λ=0, the current is


independent of the drain voltage and it behaves as an ideal current source seen from
the drain terminal.

11
CS Stage with Current-Source Load

The dc voltage VGS2 is constant and therefore v2 =0 → leads to gm2v2 = 0

H.W: Input and output impedance?


12

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy