The main IC's which are to be interfaced with 8085

are:
• 8255 PPI
• 8251 USART
• 8279 Key board display controller
• 8253 Timer/ Counter
• A/D and D/A converter interfacing.
The Intel 8255 is a widely used Peripheral Interface Adapter (PIA) designed for interfacing
peripheral devices with a microprocessor.
Expanding I/O Capabilities:
Microprocessors like the 8085 have limited built-in I/O ports. The 8255 allows the system to
expand the number of input/output ports, enabling the microprocessor to control and interact
with a larger number of external devices, such as sensors, displays, and other peripherals.

Handshaking and Synchronization:

In applications where data transfer between the microprocessor and peripheral devices needs
to be synchronized, the 8255's handshaking modes (Mode 1 and Mode 2) ensure proper
timing and data integrity.
Three 8-bit I/O Ports (Port A, B, C):
• Port A and Port B can be used for either input or output.
• Port C can be used as two separate 4-bit ports or combined as an 8-bit port for input or output.
• Port C is often used for handshaking signals.

Modes of Operation:
• Mode 0: Simple input/output mode. Ports A, B, and C operate as simple I/O ports.
• Mode 1: Used for handshaking operations, allowing for data transfer between devices with synchronization.
• Mode 2: Bi-directional bus mode.

Control Word Register (CWR):

The CWR is used to set the mode of operation for each port and configure the I/O functionality. The
microprocessor writes a control word to this register to configure the ports.

Handshaking Signals:
• In Modes 1 and 2, handshaking signals are used to coordinate data transfer between the microprocessor and peripheral
devices, ensuring proper timing and data integrity.

Applications:
•Interfacing with keyboards, displays, and printers in embedded systems.

•Data acquisition systems where multiple sensors or devices need to communicate with a central
• 8251 is a Universal Synchronous/Asynchronous Receiver/Transmitter (USART).
• Acts as a mediator between microprocessor and peripheral to transmit serial data into parallel
form and vice versa.
• 8251 allows both serial and parallel communication.
• Incorporates several error detection mechanisms to identify transmission errors during
communication.
Parity Bit: During data transmission, the sender can optionally add a parity bit to each
data frame, which can be either even or odd.
Framing Error: In asynchronous mode, the 8251 expects one or more stop bits following
the data and optional parity bits. If the stop bit is not detected, the 8251 registers a framing
error.
Overrun Error: The receiver's buffer is full, and a new character arrives before the
previous one is read by the CPU
The baud rate (speed of communication) can be controlled by an external clock or through the
internal baud rate generator.
Bit rate is the number of bits transmitted per second in a communication channel. It is measured in bits per
second (bps).
Baud rate refers to the number of signal units transmitted per second that can change or vary. It is measured
in baud (symbols per second).
Example:
Binary (1 bit per symbol): 2 possible symbols (0, 1) → 1 bit per symbol.
4-QAM (2 bits per symbol): 4 possible symbols (00, 01, 10, 11) → 2 bits per symbol.
Data Format:
• In asynchronous mode, the data format includes start bits, data bits, a parity bit, and
stop bits.
• In synchronous mode, the data format includes data bits and optional parity but no
start or stop
Operational bits. Instead, data is synchronized with a clock signal.
Modes
Synchronous Mode:
1. The 8251 can synchronize data transmission with a clock signal, making it suitable for
high-speed communication where timing is crucial.
Asynchronous Mode:
2. In this mode, data is sent without a separate clock signal, with start and stop bits used
to frame the data bytes.

Supports full-duplex and half-duplex communication modes

Example of Use:
Suppose you want to send data from a microprocessor
to a serial printer. The 8251 USART can be programmed
to operate in asynchronous mode, with the appropriate
baud rate, parity, and stop bits configured. Once
configured, data from the microprocessor can be sent to
the 8251, which will handle the serial transmission to
the printer.
8279 is a programmable keyboard and display interface used to interface a microprocessor
with a keyboard and a display device. It allows for the management of keyboard inputs and the
control of displays, such as LED or 7-segment displays.

Keyboard Scanning:
8279 checks a grid of keys (like a calculator's keypad) to see which key is pressed.
The key's position is saved in a small memory inside the 8279.
FIFO Buffer:
The key presses are stored in an 8-slot queue, so even if you press several keys quickly, the 8279
keeps track of them in order.
Display Control:
The 8279 can manage up to 7-segment displays (like on a digital clock).
Operation Modes:
•For Keyboard:
• It can either scan a matrix or directly read the key codes.
•For Display:
• It can show data from the left or the right side, depending on how you set

Common Uses:
• The 8279 is used in devices that need both keyboard input and visual output, like ATMs, cash
registers, or other embedded systems with keypads and displays.
The 8253 Timer is a programmable interval timer/counter chip widely used in computers to
generate precise time delays and count events.
It contains three independent 16-bit counters that can be used for various timing and counting
operations.
Each counter can be programmed to operate in one of six different modes, and they can count
Modes
from 0 of
to Operation:
65535.
The 8253 can operate in six different modes:
1.Mode 0 :
1. The counter loads a value and counts down to 0. When the count reaches 0, the output pin is set to high.
2.Mode 1 :
1. Used to generate a single pulse.
3.Mode 2 :
1. Produces a continuous pulse at a specific frequency.
2. This mode is useful for generating a clock signal.
4.Mode 3 :
1. The counter alternates between high and low states, generating a square wave.
2. The frequency of the square wave can be controlled by the initial value loaded into the counter.
5.Mode 4 :
1. The counter starts counting down when a value is loaded. When the counter reaches 0, the output goes
high for one clock cycle and then goes low.
6.Mode 5 :
1. Similar to Mode 4, but the counter is started by a pulse on the input. When the count reaches 0, the
output goes high for one clock cycle and then goes low.
 Operation Description
The complete functional definition of the 8253 is programmed by the system software. Once programmed, the 8253
is ready to perform whatever timing tasks it is assigned to accomplish

Where:
• SC1, SC0: Select the counter (Counter 0, Counter 1, or Counter 2).

• RW1, RW0: Defines how data is transferred (read/load least significant byte, most significant
byte, or both) 0
• .
• M2, M1, M0: Mode of operation (mode 0 to mode 5).

• BCD/BIN: Selects between binary counting (0) or BCD counting (1).

• In the 8251 USART, the parity bit can be: a) Even parity b) Odd parity c) No parity d) All of
the above

• In asynchronous mode, how does 8251 synchronize the receiver to the incoming
data? a) Using the clock signal b) Using start and stop bits c) Using parity bit d) Using status
register

• The 8253 is primarily used for: a) Serial communication b) Interrupt management c) Time
delays and event counting d) Memory management

• The parity bit in the 8251 USART is used for: a) Error detection b) Data framing c)
Generating interrupts d) Controlling baud rate

• Which register is used to configure the 8255 device? a) Status register b) Control word
register c) Data register d) Instruction register

• In the 8279, what is the function of the FIFO (First In First Out) queue? A) To store
keyboard input data B) To manage memory access C) To control display refresh rate D) To
handle serial communication

• Which register in the 8279 is used to configure the operation of the keyboard? A)
Data Register B) Control Register C) Status Register D) FIFO Register