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In this new
VGA cell, a constant current bias scheme with a PMOS differential pair
variable gain amplifier for low voltage and
(M9 and M10) provides and shares bias currents to the core of the VGA
low power wireless applications cell through the current mirrors depending on the control voltage. In
this arrangement, the transistors M3 and M4 maintain constant bias
J.K. Kwon, K.D. Kim, W.C. Song and G.H. Cho currents irrespective of the control voltage Vc-,,, because the bias
currents of the two transistors remain constant equal to the
A high frequency CMOS variable gain amplifier (VGA) employing a
new gain stage cell is proposed. A design technique based on the source current (Zs3) of the PMOS pair. Such a biasing is effective to
proposed VGA enables enhancement of its operating frequency up to obtain optimal performance in relation to the load and subsequent
about 350MHz with a gain control range of 84dB. The power stages. However, for the input transistors MI and M2, the bias currents
consumption of the VGA implemented using 0.18 pm CMOS stan- as well as V,, are changed simultaneously according to the control
dard process is about 3 mA at 1.8 V supply voltage. voltage, i.e. the VDsof the input transistors M1 and M2 are varied in the
triode region according to the control voltage while sharing the drain
Introduction: With rapid progress in such fields as wireless commu- currents with those through the transistors M7 and M8 to obtain wide
nication systems, the variable gain amplifier (VGA) is considered to variable gain. When the level of control voltage VC-,,,, is higher than
be an indispensable key function for controlling the signal power that of a reference voltage VB, high gain is obtained with relatively
level. The trend towards fully integrated wireless transceivers [ 11 for small IIP3 but vice versa when Vc-,,, is lower than VB. With current
low power consumption makes it desirable to realise low voltage sharing, this triode mode operation is suitable for low supply voltage
VGAs in CMOS technology. A wideband/high dynamic range VGA design by avoiding DC voltage stack.
as IF amplifier is required in 3G mobile standards such as
CDMA2000 or WCDMA, which may be based on super-heterodyne v,,
architecture with its advantages of high selectivity and high sensitiv-
ity. Most conventional CMOS VGAs employ multistage architecture
and combine several gain stages with a gain control circuit to satisfy
the specifications of radio communications [I-31. These VGAs
compromise between bandwidth and gain control range; however,
they do not focus on low voltage operation. It is difficult for a VGA
cell with resistor load [2] to operate with comparable performance at
U , -uu
low voltage since there is no more headroom for output voltage swing.
In this Letter, a high frequency CMOS VGA employing a new gain
stage cell is presented. It is designed with a current sharing bias
scheme for high dynamic range and active load for wideband opera-
tion workable at low supply voltage such as under 1.8 V.
Proposed VGA circuit: Fig. 1 shows a block diagram of the proposed vc-int.
VGA. It comprises an exponential function generator, a dB-linear gain U
controller and a gain stage block with output buffer. To obtain wide
dynamic range, three stages with identical structure are cascaded and
controlled externally.
60 30
40- - 20
I 6XPVGe". I ----U,,
__--___----
_---/---
20- - 10
% E
m
._
c-
m
m
0- - 0 z-
n
-
-20 - -10
case, wide dynamic range is obtained at low supply voltage by both on boosting upper high frequency in relation to the transconductance of
Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY WARANGAL. Downloaded on November 2, 2008 at 07:26 from IEEE Xplore. Restrictions apply.
M15. In the high frequency region near the -3 dB frequency of the References
gain, the output impedance of VGA cell can be approximated as 1 GUO, C., et al.: ‘A fully integrated 900-MHz CMOS wireless receiver with
on-chip RF and IF filters and 79-dB image rejection’, I E E E l Solid-Slate
z,2 CI
(1) Circuits, 2002, 37, pp. 1084-1089
gm-MI3 ’ gm-MlS 2 SONG, w.C., OH, C.J., CHO, G.H., and JUNG, H.B.: ‘High frequency/high
dynamic range CMOS VGA’, Electron. Lett., 2000, 36, (13),
It shows that this active load effectively acts like an inductive load in the
pp. 1096-1098
high frequency region. The effective inductance (Le,) of the active load 3 YAMAJI, T.,et al.: ‘A temperature-stable CMOS variable-gain amplifier
forms a parallel resonance circuit associated with parasitic capacitance with 80-dB linearity controlled gain range’, IEEE 1 Solid-state Circuits,
(C,) at the output node. Thus by adjusting the size of capacitor CI, it is 2002,37, pp. 553-558
possible to extend -3 dB frequency to a somewhat higher region by
boosting the gain at high frequency.
44 .
6
Yusong-ku, Taejon 305-701, Korea)
where CO = J ( ~ , / E , ) E 12077 51 and ko = 277/&. If we write A = nb2 this
E-mail: jkkwon@etri.re.kr
is more readily recognised as Ro = 3 1 171A2/& a well-known result
K.D. Kim: Also at Korea Advanced Institute of Science and that is referred to as the ‘traditional book formula’ in [I]. King’s
Technology (KAIST), Republic of Korea ETRI, Republic of Korea analysis [4, 51 showed, in addition, that the dipole-mode current yields a
W.C. Song: Also with Analog Chips Inc., Republic of Korea radiation resistance equal to: