2N7002K, 2V7002K

Small Signal MOSFET

60 V, 380 mA, Single, N−Channel, SOT−23
Features
• ESD Protected
• Low RDS(on)
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• Surface Mount Package
• 2V Prefix for Automotive and Other Applications Requiring Unique V(BR)DSS RDS(on) MAX ID MAX
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable 1.6 W @ 10 V
60 V 380 mA
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS 2.5 W @ 4.5 V
Compliant
SIMPLIFIED SCHEMATIC
Applications
• Low Side Load Switch
Gate
• Level Shift Circuits
1

• DC−DC Converter
• Portable Applications i.e. DSC, PDA, Cell Phone, etc. 3 Drain

MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)

Rating Symbol Value Unit Source 2

Drain−to−Source Voltage VDSS 60 V

(Top View)
Gate−to−Source Voltage VGS ±20 V
Drain Current (Note 1) ID mA MARKING DIAGRAM
Steady State 1 sq in Pad TA = 25°C 380 3 & PIN ASSIGNMENT
TA = 85°C 270 Drain
Drain Current (Note 2) ID mA 3
1
Steady State Minimum Pad TA = 25°C 320
TA = 85°C 230 2
704 MG
Power Dissipation PD mW SOT−23 G
Steady State 1 sq in Pad 420 CASE 318
Steady State Minimum Pad 300 STYLE 21 1 2
Gate Source
Pulsed Drain Current (tp = 10 ms) IDM 1.5 A
704 = Specific Device Code*
Operating Junction and Storage TJ, TSTG −55 to °C M = Date Code*
Temperature Range +150 G = Pb−Free Package
Source Current (Body Diode) IS 300 mA (Note: Microdot may be in either location)
*Specific Device Code, Date Code or overbar
Lead Temperature for Soldering Purposes TL 260 °C orientation and/or location may vary depend-
(1/8″ from case for 10 s) ing upon manufacturing location. This is a
representation only and actual devices may
Gate−Source ESD Rating ESD 2000 V not match this drawing exactly.
(HBM, Method 3015)
Stresses exceeding those listed in the Maximum Ratings table may damage the ORDERING INFORMATION
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected. Device Package Shipping†
1. Surface−mounted on FR4 board using 1 sq in pad size with 1 oz Cu.
2. Surface−mounted on FR4 board using 0.08 sq in pad size with 1 oz Cu. 2N7002KT1G SOT−23 3000 / Tape & Reel
(Pb−Free)

2V7002KT1G SOT−23 3000 / Tape & Reel

(Pb−Free)

†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.

© Semiconductor Components Industries, LLC, 2015 1 Publication Order Number:

April, 2015 − Rev. 13 2N7002K/D
 2N7002K, 2V7002K

THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Junction−to−Ambient − Steady State (Note 3) RqJA 300 °C/W

Junction−to−Ambient − t ≤ 5 s (Note 3) 92
Junction−to−Ambient − Steady State (Note 4) 417
Junction−to−Ambient − t ≤ 5 s (Note 4) 154
3. Surface−mounted on FR4 board using 1 sq in pad size with 1 oz Cu.
4. Surface−mounted on FR4 board using 0.08 sq in pad size with 1 oz Cu.

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)

Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 60 V
Drain−to−Source Breakdown Voltage V(BR)DSS/TJ 71 mV/°C
Temperature Coefficient
Zero Gate Voltage Drain Current IDSS VGS = 0 V, TJ = 25°C 1 mA
VDS = 60 V TJ = 125°C 10
VGS = 0 V, TJ = 25°C 100 nA
VDS = 50 V
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±10 mA
VDS = 0 V, VGS = ±10 V 450 nA
VDS = 0 V, VGS = ±5.0 V 150 nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA 1.0 2.3 V
Negative Threshold Temperature VGS(TH)/TJ 4.0 mV/°C
Coefficient
Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 500 mA 1.19 1.6 W
VGS = 4.5 V, ID = 200 mA 1.33 2.5
Forward Transconductance gFS VDS = 5 V, ID = 200 mA 530 mS
CHARGES AND CAPACITANCES
Input Capacitance CISS 24.5 45 pF
VGS = 0 V, f = 1 MHz,
Output Capacitance COSS 4.2 8.0
VDS = 20 V
Reverse Transfer Capacitance CRSS 2.2 5.0
Total Gate Charge QG(TOT) 0.7 nC
Threshold Gate Charge QG(TH) VGS = 4.5 V, VDS = 10 V; 0.1
Gate−to−Source Charge QGS ID = 200 mA 0.3
Gate−to−Drain Charge QGD 0.1
SWITCHING CHARACTERISTICS, VGS = V (Note 6)
Turn−On Delay Time td(ON) 12.2 ns
Rise Time tr VGS = 10 V, VDD = 25 V, 9.0
Turn−Off Delay Time td(OFF) ID = 500 mA, RG = 25 W 55.8
Fall Time tf 29
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V, TJ = 25°C 0.8 1.2 V
IS = 200 mA TJ = 85°C 0.7
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
6. Switching characteristics are independent of operating junction temperatures

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 2N7002K, 2V7002K

TYPICAL CHARACTERISTICS

1.6 1.2
VGS = 10 V 5.0 V
4.5 V
9.0 V
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

8.0 V 4.0 V
1.2
7.0 V
6.0 V 0.8
3.5 V
0.8
TJ = 25°C
3.0 V 0.4
0.4
2.5 V
TJ = 125°C TJ = −55°C
0 0
0 2 4 6 0 2 4 6
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

3.2 3.2
VGS = 4.5 V VGS = 10 V
2.8 2.8
TJ = 125°C
2.4 TJ = 85°C 2.4 TJ = 125°C

2.0 TJ = 25°C 2.0 TJ = 85°C

1.6 1.6 TJ = 25°C

TJ = −55°C
1.2 1.2
TJ = −55°C
0.8 0.8

0.4 0.4
0 0
0 0.2 0.4 0.6 0.8 1.0 1.2 0 0.2 0.4 0.6 0.8 1.0 1.2
ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Drain Current and Figure 4. On−Resistance vs. Drain Current and
Temperature Temperature
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

2.4 2.2
ID = 0.2 A
RESISTANCE (NORMALIZED)
RDS(on), DRAIN−TO−SOURCE

2.0 ID = 500 mA
1.8
VGS = 4.5 V
1.6
VGS = 10 V
1.4
ID = 200 mA
1.2

1.0
0.8

0.4 0.6
2 4 6 8 10 −50 −25 0 25 50 75 100 125 150
VGS, GATE−TO−SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance vs. Gate−to−Source Figure 6. On−Resistance Variation with
Voltage Temperature

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 2N7002K, 2V7002K

TYPICAL CHARACTERISTICS

30 5

VGS, GATE−TO−SOURCE VOLTAGE (V)

Ciss
TJ = 25°C
4 ID = 0.2 A
C, CAPACITANCE (pF)

20
3
TJ = 25°C
VGS = 0 V
Coss 2
10

Crss
0 0
0 4 8 12 16 20 0 0.2 0.4 0.6 0.8
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge

10 2.5
2.4 ID = 250 mA
VGS = 0 V VGS(TH), THRESHOLD VOLTAGE (V)
2.3
IS, SOURCE CURRENT (A)

2.2
2.1
1 2.0
1.9
1.8
TJ = 85°C TJ = 25°C 1.7
1.6
0.1 1.5
1.4
1.3
1.2
1.1
0.01 1.0
0.4 0.6 0.8 1.0 1.2 −50 −25 0 25 50 75 100 125 150
VSD, SOURCE−TO−DRAIN VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C)
Figure 9. Diode Forward Voltage vs. Current Figure 10. Threshold Voltage with
Temperature

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 2N7002K, 2V7002K

TYPICAL CHARACTERISTICS

1000
RqJC(t) (°C/W) EFFECTIVE TRANSIENT

Duty Cycle = 0.5

100 0.2
THERMAL RESISTANCE

0.1
0.05
10 0.02

0.01
1
SINGLE PULSE

0.1
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
t, PULSE TIME (s)
Figure 11. Thermal Response − 1 sq in pad

1000
RqJC(t) (°C/W) EFFECTIVE TRANSIENT

Duty Cycle = 0.5

0.2
100
THERMAL RESISTANCE

0.1
0.05
0.02
10

0.01
1
SINGLE PULSE

0.1
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
t, PULSE TIME (s)
Figure 12. Thermal Response − minimum pad

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 2N7002K, 2V7002K

PACKAGE DIMENSIONS

SOT−23 (TO−236)
CASE 318−08
ISSUE AP

NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
D 2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
SEE VIEW C THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
3 THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
E HE MILLIMETERS INCHES
DIM MIN NOM MAX MIN NOM MAX
A 0.89 1.00 1.11 0.035 0.040 0.044
c A1 0.01 0.06 0.10 0.001 0.002 0.004
1 2
b 0.37 0.44 0.50 0.015 0.018 0.020
b c 0.09 0.13 0.18 0.003 0.005 0.007
e 0.25 D 2.80 2.90 3.04 0.110 0.114 0.120
E 1.20 1.30 1.40 0.047 0.051 0.055
q e 1.78 1.90 2.04 0.070 0.075 0.081
L 0.10 0.20 0.30 0.004 0.008 0.012
L1 0.35 0.54 0.69 0.014 0.021 0.029
A HE 2.10 2.40 2.64 0.083 0.094 0.104
q 0° −−− 10 ° 0° −−− 10°
L
A1 STYLE 21:
L1 PIN 1. GATE
2. SOURCE
VIEW C 3. DRAIN

SOLDERING FOOTPRINT
0.95
0.95 0.037
0.037

2.0
0.079

0.9
0.035
SCALE 10:1 ǒinches
mm Ǔ

0.8
0.031

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