CHAPTER FIVE

COMBINATIONAL LOGIC ANALYSIS

Content Outlines
5.1. Basic Combinational Logic Circuits

5.2. Implementing Combinational Logic

5.3. The Universal Property of NAND and NOR Gates

5.4. Combinational Logic Using NAND and NOR Gates

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 5.1. Basic Combinational Logic Circuits
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 AND-OR Logic Circuit

 AND-OR-Invert Logic Circuit

 Exclusive-OR Logic Circuit

 Exclusive-NOR Logic Circuit

 AND-OR Logic Circuit

 A circuit consisting of any number of AND gates and an

OR gate.

 Example: SOP expressions

 If any of the AND gates output are HIGH, the output in

the OR gate is HIGH

 If all of the AND gates outputs are LOW, the output in

the OR gate is LOW
 A AB Truth Table
B SOP INPUTS OUTPUT

X = AB + CD A B C D AB CD X

C 0 0 0 0 0 0 0

D CD 0 0 0 1 0 0 0
0 0 1 0 0 0 0
Distictive Shape 0 0 1 1 0 1 1
0 1 0 0 0 0 0
0 1 0 1 0 0 0
0 1 1 0 0 0 0
0 1 1 1 0 1 1
A & >1 1 0 0 0 0 0 0
B
1 0 0 1 0 0 0
X
1 0 1 0 0 0 0
C
1 0 1 1 0 1 1
D &
1 1 0 0 1 0 1

Rectangular Outline 1 1 0 1 1 0 1
1 1 1 0 1 0 1
1 1 1 1 1 1 1

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 Cont…
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 Example 5.1: In a certain chemical-processing plant, a liquid

chemical is used in a manufacturing process. The chemical is
stored in three different tanks. A level sensor in each tank
produces a HIGH voltage when the level of chemical in the tank
drops below a specified point.

 Design a circuit that monitors the chemical level in each tank

and indicates when the level in any two of the tanks drops
below the specified point.
 Cont…
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3 Tanks A, B, C

A Level LSA = 1

B Level LSB = 1

C Level LSC = 1

If any 2 tanks' level drops, signal

AB LSA = 1 and LSB = 1 SignalAB

AC LSA = 1 and LSC = 1 SignalAC

BC LSB = 1 and LSC = 1 SignalBC

When any signal is on, indicator is HIGH

Indicator = 1
 Cont…
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 X = AB + AC + BC
 AND-OR-Invert Logic Circuit
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 It’s the completed AND-OR circuit

 Example: POS expressions
 Results are the complement of AND-OR circuit.
A AB
B POS
AB + CD AB + CD = (A + B)(C + D)

C
D CD

A & >1
B
X
C &
D
 Cont…
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Truth Table
INPUTS OUTPUT OUTPUT
A B C D AB CD XCD
AB + X

0 0 0 0 0 0 0 1
0 0 0 1 0 0 0 1
0 0 1 0 0 0 0 1
0 0 1 1 0 1 1 0
0 1 0 0 0 0 0 1
0 1 0 1 0 0 0 1
0 1 1 0 0 0 0 1
0 1 1 1 0 1 1 0
1 0 0 0 0 0 0 1
1 0 0 1 0 0 0 1
1 0 1 0 0 0 0 1
1 0 1 1 0 1 1 0
1 1 0 0 1 0 1 0
1 1 0 1 1 0 1 0
1 1 1 0 1 0 1 0
1 1 1 1 1 1 1 0
 Exclusive-OR Logic Circuit
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 Known as XOR & has its own unique symbol

 XOR is a combination of 2 AND gates, 1 OR gate and 2 inverters
 Output expression
X = AB + AB

A B X
X = A B 0 0 0
0 1 1
1 0 1
1 1 0
X-OR truth table
 Cont…

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A

X = AB + AB

(a) Logic diagram

A =1
A
X X
B B

(b) ANSI distinctive (c) ANSI rectangular

shape symbol outline symbol
 Exclusive-NOR Logic (XNOR) Circuit
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 The complement of XOR function

 Implemented by inverting XOR output.

A XOR

(a) X = AB + AB
 Cont..
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❖Or by directly implementing the expression

AB + AB

A
AB

B X

AB

(b) X = AB + AB
 5.2. Implementing Combinational Logic Circuit
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 From a Boolean Expression to a Logic Circuit

 From a Truth Table to a Logic Circuit

 Boolean Expression to Logic Circuit

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 Given the Boolean expression

X = AB + CDE
 It is made of 2 terms
1. AB
2. CDE
 Which are then OR-ed
AND
X = AB + CDE
OR
 Cont..
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 Both terms 1 and 2 are AND-terms

 These are done before the OR
 It is much like math: (AB)+(CDE)
 To implement this Boolean expression needs:
 1 2-input AND-gate ➔ AB
 1 3-input AND-gate ➔ CDE
 1 2-input OR-gate ➔ AB + CDE

A AB
B
X = AB + CDE
C
D
E CDE
 Truth Table to Logic Circuit
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 If a truth table instead of an expression, logic circuit

can still be implemented.

 Step 1: Get the product term from HIGH outputs

 Step 2: From the product term get the expression

 This is done by OR-ed the product terms

 Step 3: Implement the logic circuit.

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 Step 1:

 Step 2: X = ABC + A BC
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 Step 3:
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 Another example: Given the truth table below, to get the

combinational logic circuit.

 Step 1:

 Step 2: X = ABC + A BC + AB C
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 Step 3:
 Reducing a combinational logic circuit
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 Reducing a combinational logic circuit will result in lesser gates

used.

 How to do this?

 Step 1: Read the logic circuit and identify the number of

domains

 Step 2: Get the final output expression

 Step 3a: Apply DeMorgan’s theorem and Boolean algebra

 Step 3b: K-map can be used too.

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 Example: Simplify the given combinational logic circuit below,

 Step 1: The domain A, B, C and D.

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Step 2
Output Expression of the circuit is X = (ABC)C + ABC + D

Step 3
X = (A + B + C)C + A + B + C + D DeMorgan's theorem
= AC + BC + CC + A + B + C + D
= AC + BC + C + A + B + C + D CC = C ; C + C = C
= C(A + B + 1) + A + B + D => (A + AC) + (B + BC) + C + D
X=A+B+C+D => A + B + C + D

Simplified circuit :
A
B X
C
D
 Cont…

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Example: Minimize the combinational logic circuit in figure

below. Inverters for the complemented variables are not shown.
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Step1: The domain A, B, C and D.

Step 2
Output Expression of the circuit is

X = ABC + ABCD + ABCD + ABCD

Change it to standard SOP form:
X = ABCD + ABCD + ABCD + ABCD +ABCD

Step 3
Map it:
CD Simplified circuit
AB 00 01 11 10
00 1 1 BC A
C
01 D
X
11 1 ACD B
10 1 1 C
 Cont…

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Or can also apply the rules and theorems

X = ABC + ABCD + ABCD + ABCD

Change it to standard SOP form:

X = ABCD + ABCD + ABCD + ABCD + ABCD

= ABCD + ACD(B + B) + ABCD + ABCD (B + B) = 1
= ABCD + ACD(1) + ABC(D + D) (D + D) = 1
= ABCD + ACD + ABC(1)
= BC(A + A) + ACD
= BC(1) + ACD
= BC + ACD
 5.3. The Universal Property of NAND and NOR Gates
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 The NAND gate as a Universal Logic Element

 The NOR gate as a Universal Logic Element

 The NAND Gate as Universal Logic Element

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 The NOR Gate as Universal Logic Element

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 5.4. Combinational Logic Using NAND and NOR Gates
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 NAND Logic
 NOR Logic

Figure a. NAND logic for X = AB + CD

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Development of the AND-OR equivalent of the circuit in figure a-c.

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Illustration of the use of the appropriate dual symbols in a NAND logic diagram in figure
below
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Redraw the logic diagram and develop the output expression for
the circuit in figure below using the appropriate dual symbols.
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Example: Given the NOR logic for X = (A + B)(C + D), redraw the
logic circuit using dual symbols.
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Illustration of the use of the appropriate dual symbols in a NOR

logic diagram.
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Develop the output expression and redraw using equivalent

negative-AND symbols.
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