BASIC ELECTRONICS LAB - R24MIACL001

LABORATORY MANUAL(R24) - V1.0

Department of Electronics and Communication Engineering

Maharaj Vijayaram Gajapathi Raj College of Engineering (Autonomous)
Re-Accredited by NBA of AICTE, Graded ‘A’ by NAAC of UGC, Approved by AICTE, New Delhi,
Permanently Affiliated to JNTU, Kakinada & Listed u/s 2(f) and 12(B) of the UGC ACT 1956
Vijayaram Nagar, Vizianagaram-535005.

Name :
Regd No:
Class:
 BASIC ELECTRONICS LAB - R24MIACL001
LABORATORY MANUAL(R24) - V1.0

R24 Regulation

ECE
B.Tech III Semester
2025-26

Prepared by
Mrs.U.N.Subhadra Devi, Assoc.Prof(TP)
Mr. K.Rakesh, Assoc.Prof(TP)

Department of Electronics and Communication Engineering

Maharaj Vijayaram Gajapathi Raj College of Engineering (Autonomous)
Re-Accredited by NBA of AICTE, Graded ‘A’ by NAAC of UGC, Approved by AICTE, New Delhi,
Permanently Affiliated to JNTU, Kakinada & Listed u/s 2(f) and 12(B) of the UGC ACT 1956
Vijayaram Nagar, Vizianagaram-535005.
Institute Vision & Mission

VISION

Maharaj Vijayaram Gajapathi Raj College of Engineering strives to become a centre par
excellence for technical education where aspiring students can be transformed into skilled and
well-rounded professionals with strong understanding of fundamentals, a flair for responsible
innovation in engineering practical solutions applying the fundamentals, and confidence and
poise to meet the challenges in their chosen professional spheres.

MISSION

The management believes imparting quality education in an atmosphere that motivates learning
as a social obligation which we owe to the students, their parents/guardians and society at large
and hence the effort is to leave no stone unturned in providing the same with all sincerity.

ECE Department Vision & Mission

VISION

To be a center of excellence in Electronics and Communication Engineering by making students

abreast with contemporary technologies meeting the standards of global industry and to develop
them into skillful engineers who are technologically superior with knowledge of core as well as
inter disciplinary domains with human values.

MISSION

 Establish a unique learning environment to enable the students to face global challenges
by using latest technologies in Electronics and Communication.
 Establish centers of excellence in niche technologies to inculcate the spirit of innovation
and creativity in faculty and students.
 Provide an environment for collaborative and inter disciplinary activities that enables
students to develop industry ready and entrepreneurial skills.
 Provide ethical and value-based education to serve humanity by developing socially
sensitive engineers.
PROGRAMME SPECIFIC OUTCOMES:

PSO1: An ability to design and implement complex systems in the areas related to Analog and
Digital Electronics, Communication, Signal processing, RF & Microwave, VLSI and
Embedded systems.

PSO2: Ability to make use of acquired knowledge to be employable and demonstrate leadership
and entrepreneurial skills.

Program Outcomes

Engineering Graduates will be able to:

1. Engineering knowledge: Apply the knowledge of mathematics, science,

engineering fundamentals, and an engineering specialization to the solution of complex
engineering problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze
complex engineering problems reaching substantiated conclusions using first principles
of mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering
problems and design system components or processes that meet the specified needs
with appropriate consideration for the public health and safety, and the cultural, societal,
and environmental considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and
research methods including design of experiments, analysis and interpretation of data,
and synthesis of the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and
modern engineering and IT tools including prediction and modelling to complex
engineering activities with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to
assess societal, health, safety, legal and cultural issues and the consequent
responsibilities relevant to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional
engineering solutions in societal and environmental contexts, and demonstrate the
 knowledge of, and need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities
and norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or
leader in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and
write effective reports and design documentation, make effective presentations, and give
and receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a
member and leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to
engage in independent and life-long learning in the broadest context of technological
change.
COURSE OUTCOMES:

After completion of this laboratory course, the learner should be able to

1. Understand the working of various basic electronic components.
2. Demonstrate the use of transistor as amplifier.
3. Have the ability to use op-amp as summer and subtractor.
4. Have the ability to implement Amplitude demodulation.
5. Have the ability to program 8086 microprocessors to perform arithmetic operations.

Mapping of Course Outcomes with Program Outcomes:

PO PO PO PSO PSO
CO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9
10 11 12 1 2
1 3 3 2 3 1 1

2 3 3 3 2 3 1 2 2

3 3 2 3 2 3 2 1

4 3 3 3 2 3 3 3 2

5 3 3 2 2 2 1

Mapping with PO’s use (1-Low , 2-Medium, 3-High)

R24MIAC BASIC ELECTRONICS LAB SYLLABUS (R24)
L001
Total Contact 45 (P) L T P C
Hours

Pre-requisite Physics, BE 0 0 3 2

Course Objective: To provide hands-on experience in fundamental electronic components and

circuits, including diode, transistor and SCR characteristics, rectifiers, wave shaping, filters,
amplifiers, oscillators, operational amplifier applications, and basic microprocessor programming.

List of Experiments: (Minimum of Ten Experiments should be performed either with Hardware
or simulation)
VI Characteristics of PN diode
1
Zener diode as voltage regulator
2
Full wave rectifier without filter
3
Full wave rectifier with capacitor filter
4

5 NonLinear waveshaping – Clippers.

6 Non Linear wave shaping- Clampers

7 Design of RC low pass filter/RC high pass filter

8 Transistor CE characteristics
CE amplifier frequency response
9
Implementing any one application using Op-Amp
10
RC phase shift oscillator
11
SCR characteristics
12
Implementing AM demodulation using diode detector
13
Implementing arithmetic operation of two numbers using 8086 microprocessor
14
LEARNING RESOURCES

TEXT BOOKS:

1 CMOS Digital Integrated Circuits Analysis and Design, Sung-Mo Kang, TMH, 3rd Ed., 2011

2 CMOS Analog IC Design: Fundamentals, Third Edition, Erik Bruun, 2022

REFERENCE BOOKS:

1 Digital Integrated Circuits, A Design Perspective, JanM.Rabaey, Anantha Chandrakasan,

Borivoje Nikolic.
Department of Electronics and Communication Engineering Basic Electronics Lab

Experiment No: 1

V-I CHARACTERISTICS OF P-N JUNCTION DIODE

AIM:
1. To plot the V-I characteristics of a given semiconductor diode, both for
forward and reverse bias for the given circuit.
2. To find the cut-in voltage.
3. To calculate the dynamic and static resistances of the diode.

APPARATUS:

1. Power supply 0-30V 1No.

2. Voltmeters 0-1V 1 No.
0-30V 1 No.
3. Ammeters 0-10mA 1 No.
0-500A 1 No.

COMPONENTS:

1. Semiconductor diode 1N4007 1No.

2. Resistor 1K 1No

THEORY:

P - N junction diode:

If donor impurities are introduced into one side and acceptors into the other side of a
single crystal of a semiconductor, a p-n junction is formed.

Junction
Acceptor ion Donor ion

Hole Electron

p-type n-type

P N JUNCTION DIODE

The region uncovered by +ve and –ve ions is called the depletion region, the space
charge region or the transition region. The thickness of the region is of the order of
the wavelength of the visible light (0.05 micron). When p-n junction is formed, the
concentration of the holes in p side is much greater than that in the n-side; a very large
hole-diffusion current tends to flow across the junction from the p to n material.
Hence an electric field must build up across the junction in such a direction that the
hole drift current will tend to flow across the junction from n to p side in order to
counter balance the diffusion current. This equilibrium condition of zero resultant
hole current results at potential barrier Vo. The numerical value for Vo is of the order
of magnitude of a few tenths of a Volt.

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The p-n junction can be operated in two regions

1) Forward bias 2) Reverse bias

Forward Bias:

A forward bias or „on‟ condition is established by applying the +ve potential to the p-
type material and –ve potential to the n-type material as shown in the figure.

P N

+ -
+ - V
V

PN JUNCTION DIODE UNDER FORWARD BIAS

When the voltage difference between the p and n points is greater the Vᵧ then the
diode is forward bias otherwise reverse biased.

In forward bias the height of the potential barrier at the junction will be lowered by
the applied forward voltage V. The holes cross the junction from p in to the n type
region and become a minority current in the P side. Similarly the electrons cross the
junction in reverse direction and become the minority carriers in p side. Holes
traveling from left to right constitute a current in the same direction as the electrons
moving from right to left. Hence the resultant current crossing the junction is the sum
of the hole and electron minority current.

Reverse Bias:

A reverse bias or „off‟ condition is established by applying the –ve potential to p-type
material and +ve potential to n-type material as shown in the figure below

In the reverse bias both the holes in p-type and the electrons in n-type will move away
from the junction. The height of the potential barrier increases. This increase in the
barrier serves to reduce the flow of majority carriers. Hence zero current results.
However the minority carriers are uninfluenced by the increase in height of the
barrier. So a small current will flow due to these minority carriers and is called the
reverse saturation current.

P N

- +
M.V.G.R.College Of- Engineering(A)
+ V 2
V

PN JUNCTION DIODE UNDER REVERSE BIAS

Department of Electronics and Communication Engineering Basic Electronics Lab

Volt-ampere characteristics:

Ge Si

Cut-inVoltage V

VZ

The characteristics of the semiconductor diode can be defined by the following

equation for forward and reverse bias regions.

ID = IS (e VD / ηVT – 1 )

Where VD = diode voltage,

ID = diode current
IS = reverse saturation current or a scale current which is a function of donor
and acceptor impurity concentration, diode temperature and area of the junction etc.,

The value of η lies in the range of „1‟ to „2‟ and depending upon the
1. Size of the diode
2. The semiconductor used to make it.
3. The magnitude of the forward current.
4. The value of Is.
In general the η value for silicon is „2‟ and for germanium is „1‟

VT = Volt equivalent temperature KT/q

K = Boltzmann constant = 1.38 × 10 – 23 j / 0 K
T = Temperature in 0K
q = charge = 1.603 × 10 – 19 coulombs.

Cut-in voltage (offset, break point or threshold voltage) (V):

The cut-in voltage is defined as the voltage across the diode below which the current
is very small ( say less than 1% max rated value), and beyond V the current raises
very rapidly.

The temperature dependence of the V-I characteristics:

The reverse saturation current I0 doubles for every 100 C raise in temperature. If IO =
IO1 at T = T1 then at temperature T, I0 is given by I0(T) = I01 × 2(T-T1)/10. The diode
voltage decreases with the temperature and is given as dv / dt = -2.5mv / 0C

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Department of Electronics and Communication Engineering Basic Electronics Lab

Dynamic resistance  η VT / I

Diode equivalent circuits:

V
A A A

Diode Rf Forward resistance Rr Forward resistance

B (in the order of 100Ω) (in the order of MΩ)
B B
Forward bias Reverse bias

CIRCUIT DIAGRAM:

0-10mA 0-500uA
1KΩ + A 1KΩ + A

+ +
0-30V 1N4007 V 0-1V 0-30V 1N4007 V 0-30V

Fig-1a Fig -1b

FORWARD BIAS REVERSE BIAS

PROCEDURE

Forward Bias:

1. Connect the circuit as shown in the Fig 1a.

2. Vary the supply voltage gradually, starting from zero. Increase the applied
voltage and note the voltmeter reading (V)
3. For each 0.1 V step in Voltmeter note the corresponding forward current (I)
till Voltage becomes 0.7 V. Current (I) should not exceed 10mA.
4. Tabulate the result and draw the V-I characteristics under forward bias
conditions.

Reverse Bias:

1. Connect the circuit as shown in the Fig.1b.

2. Measure the current (reverse current in micro amperes) and voltage by
increasing the voltmeter voltage with 1V step, Upto 20V.
3. Tabulate the results and plot the reverse bias characteristics.
4. The reciprocal of the slope of these curves for both the conditions gives the
resistance for forward and reverse bias conditions.

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OBSERVATIONS:

Forward bias:

S. No V(volts) I (mA)

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Department of Electronics and Communication Engineering Basic Electronics Lab

Reverse bias:

S. No V(volts) I (µA)

MODEL GRAPHS:

V (volts)
I (mA) Vr

I Ir
If

Vf V (volts) I (A)

V

Forward bias characteristics Reveres Bias characteristics

RESULTS:

1. Cut-in voltage =
2. Dynamic forward resistance = Vf / If
3. Static forward resistance = V/I
4. Dynamic reverse resistance = Vr / Ir
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Department of Electronics and Communication Engineering Basic Electronics Lab

CONCLUSION:

Equipment Limitation:

1KΩ: To limit the flow of current in the circuit and protect the diode, even though we
can use above 1K Ω resistance by which the voltage drop across resistor will be more
and it requires more power supply, we are using 1K Ω.
Voltmeter (0-1)v : The minimum voltage required for the diode to start conduction
is 0.6v. so the voltmeter range (0-1)v is sufficient.
Ammeter(0-10)ma: The maximum capability of the ammeter is( 0-100)mA because
of equipment limitation we are using (0-10)mA.

QUESTIONS:

1. What is a diode? What is biasing?

2. How can you design this circuit?
3. How did you arrive at the range of the meters?
4. What are the differences between Germanium diode and Silicon diode?
5. What do you mean by cut-in voltage (Knee voltage)? Define and explain it.
6. What are the applications of a diode? State and explain them.
7. What is junction barrier potential?
8. What do you mean by reverse saturation current?
9. What is the effect of temperature on the diode?
10. Draw VI characteristics of PN junction diode.
11. Differentiate between static and dynamic resistance of a diode.
12. What are the different types of diodes?
13. List the outcomes of this experiment.

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Experiment No: 2

ZENER DIODE AS A VOLTAGE REGULATOR

AIM:
1. To plot the V-I characteristics of the given Zener diode, both for forward and
reverse bias for the given circuit.
2. To study the performance of a Zener diode as a voltage regulator.

APPARATUS:

1. Power supply 0-30V 1 No.

2. Ammeters 0-10mA 1 No.
0-100mA 1 No.
3. Voltmeters 0-1V 1 No.
0-10V 1 No.

COMPONENTS:

1. Zener diode BZ 6.2 V 1No.

2. Resistor 1K 1No.

THEORY:

Diodes which have adequate power-dissipating capabilities to operate in the break-

down region are commonly called Zener diodes. These devises are employed as
voltage regulators.

The location of the Zener region can be controlled by varying the doping levels. An
increase in the doping produces an increase in the number of added impurities.
Further, this will decrease the Zener potential. Zener diodes are available in the Zener
potential range of 1.8 V to 200V with power rating from ¼W to 50W. Silicon is
usually preferred in the manufacturing of Zener diodes because of its higher
temperature and current handling capabilities.

The equivalent circuit of the Zener diode in the Zener region is given below.

Vz

Vz
Rz

Equivalent Symbol Complete Approximated

Two processes which produce the breakdown region are Avalanche multiplication and
Zener breakdown which are explained below.

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Department of Electronics and Communication Engineering Basic Electronics Lab

Avalanche breakdown

The thermally generated electrons and holes acquire sufficient energy from the
applied potential to produce new carriers by removing the valance electrons from their
bonds. These new carriers in turn produce additional carriers again through the
process of disrupting bonds. This cumulative process is referred as avalanche
breakdown. Avalanche multiplication involves when the reference voltage is above
„6V‟. The temperature co-efficient is positive (% change in reference voltage per
centigrade degree change in diode temperature)

A junction with broad depletion layer, and therefore low field intensity will break
down by the avalanche mechanism.

Zener breakdown

This process initiates breakdown through a direct rupture of the bonds because of the
existence of a strong electric field. Zener breakdown involves when the reference
voltage is below „6V‟. The temperature co-efficient is negative.

A junction having a narrow depletion layer width and high field intensity will
breakdown by the Zener mechanism.

The networks employing Zener diodes can be analyzed by replacing the Zener diode
equivalent circuits („on‟ and „off‟ states).

V V
VZ
VZ

„ON‟ state „OFF‟ state

V>VZ VZ>V>0V

CIRCUIT DIAGRAMS:

0-10mA 0-100mA
1KΩ 1KΩ
+ A +
A

+ +
0-30V 0-1V 0-30V
BZ 6.2V V BZ 6.2V V 0-10V

Fig –2a Fig – 2b

FORWARD BIAS REVERSE BIAS

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PROCEDURE:

Forward Bias:

1. Connect the circuit as shown in Fig. 2a.

2. Vary the supply voltage gradually, starting from zero. Increase the supply voltage
and note the voltmeter reading (V) for each 0.1V step in Voltmeter, note the
corresponding forward current (I) till V becomes say 0.7 V. I should not exceed
10mA.
3. Tabulate the results and draw the V-I characteristics under forward bias
conditions.

Reverse Bias:

1. Connect the circuit as shown in Fig .2b.

2. Increase the supply voltage suitably, to read Iz in steps of 5mA, starting from zero
upto say 40mA, note the corresponding values of Vz.
3. Tabulate the results and draw the V-I characteristics under reverse bias conditions.

OBSERVATIONS:

Forward bias:

S. No V(volts) I (mA)

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Department of Electronics and Communication Engineering Basic Electronics Lab

Reverse bias:

S. No V(volts) I (mA)

MODEL GRAPHS

V (volts)
I (mA)

I (mA)

V (volts)
FORWARD BIAS REVERSE BIAS

RESULTS:

Cut-in voltage =

Break down voltage =

Dynamic forward resistance =

Static forward resistance =

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CONCLUSION:

Equipment Limitation:

1KΩ: To limit the flow of current in the circuit and protect the diode. even though we
can use above 1K Ω resistance but the voltage drop across resister will be more and it
requires more power supply, due to this limitation we are using 1K Ω.
Voltmeter (0-1)V : The minimum voltage required for the diode to start conduction
is 0.6v. so the voltmeter range (0-1)V is sufficient.
Ammeter (0-10)mA: The maximum capability of the ammeter is( 0-100)mA.
Because of equipment limitation we are using (0-10)mA

QUESTIONS:

1. What is a zener diode? How is it different from PN diode?

2. What are the applications of Zener diode?
3. What is breakdown? How many types of breakdowns are there? Explain them.
4. Although zener diode is operated in the reverse breakdown region, but it does
not burn. Why?
5. Explain how zener diode acts as a regulator.
6. Give a list of Zener diodes available in your laboratory. Also provide their
specifications.
7. Differentiate between line regulation & load regulation.
8. List the outcomes of this experiment

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Department of Electronics and Communication Engineering Basic Electronics Lab

Experiment No: 3
FULL WAVE RECTIFIER WITHOUT FILTER
AIM: To determine the following parameters for a full wave rectifier circuit without
filters.
1. Ripple factor,
2. Variation in % regulation
3. To observe the o/p on DSO.

APPARATUS:

1. Ammeters 0-100mA 1No.

2. Digital multi-meter 1No.
3. Decade resistance box 1No.
4. Decade inductance box 1No

COMPONENTS:

1. Diode 1N4007 2 No.

2. Transformer 230V / 16-0-16 V, 0.5A, 1No.

THEORY:

Full wave rectifier:

The circuit of the full wave rectifier is shown below. This circuit is seen to comprise
two half-wave circuits connected so that conduction takes place through one diode
during one half cycle and thorough other diode during the second half of the cycle.

During the positive cycle of the input signal D1 is forward biased and i1 current is
flown through D1 and RL. During negative half cycle of the input signal, D2 is reverse
biased and i2 current is flowing through D2 and RL. The current to the load, which is
the sum of these currents, i = i1+i2.

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The dc and rms values of the load current and load voltages are.

Idc = Average value = Area of one cycle divided by π.


 im
Idc =  I m sin  .d  m  cos 0 =
1 I 
(2) = 2Im / Π
 0
 
Vm 2I R
Where Im= , Vdc  I dc R L  m L
R f  RL 
Vm is the peak transformer secondary voltage from one end to the center tap. The dc
output voltage of the full wave connection is twice that for the half wave circuit.
Because the area above the axis for one full AC input cycle is twice that obtained for
a half-wave system.

I  1  cos 2 
2
1
I2rms =  I m sin 2  ..d = m   d
2

 0  0 2

sin 2 
2
Im 
    = Im / 2
2
=
2 0

Im
Irms =
2

PIV:

When any one of the two diodes is reverse biased, (let that is replaced by open circuit)
the maximum voltage appears across that open circuit. This can be solved by
following equivalent circuits

A B
AC mains

vm vm
RL RL

vm vm
C D

When D1 open circuited(reverse biased) when D1 short circuited(forward

biased)
D2 short circuited ( forward biased) D2 open circuited(reverse
biased)

By applying the KVL we can find out , VAB or VCD

VAB = VCD = 2vm

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Thus, when any diode is reverse biased, then a maximum of 2vmappears across that
diode. For safe operation, the PIV rating of that diode should be greater that or equal
to 2vm

PIV >2vm for center tap transformer full-wave rectifier

A rectifier circuit is necessary to convert a signal having zero average value into one
that has a non-zero average. A filter circuit is necessary to provide a steadier DC
voltage.

Ripple factor:

The filtered output has a DC value and some ac variations (ripple). These smaller the
ac variation with respect to the DC level the better the filter circuit operation.
The filter voltage waveform with DC and ripple voltages is shown below.

rmsvalueofaccomponentofasignal V rms
Ripplefactor ( )  
averagevalueofasignal V dc
Voltage regulation:

The variation of dc output as a function of dc load current is called regulation. The

percentage regulation is given as

% regulation = V no load – V load  100%

V load
V no load  dc output voltage under zero load current (RL= )
V load  dc output voltage at normal load current at which regulation is
determined.

For ideal power supply the output voltage is independent of the load current or the
load resistance and the percentage regulation is zero.

FULL WAVE RECTIFIER WITHOUT FILTER

CIRCUIT DIAGRAM:
0-100mA
1N4007
+A
+
V DMM
230V,50Hz
AC supply

DRB

1N4007

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PROCEDURE:

1. Connect the circuit as shown in the diagram.

2. Give input from AC mains and measure the secondary voltage Vs of the
transformer.
3. Measure the no load DC voltage using DMM. Let this be VNL.
4. Now connect the DRB. Vary the DRB and note the values of Idc, in steps of
10mA until the current reaches 100mA.
5. At each step measure the VDC and VAC. Calculate ripple factor  as the ratio of
VAC/ VDC.

OBSERVATIONS:

VNL=
% regulation
S.No IDC VDC VAC RL= VDC / IDC  = VAC/VDC VNL-VDC × 100
VDC

RESULTS:

Without Filter:

Plot the graphs of VDC vs IDC,  vs IDC and % regulation vs IDC

VDC =

Vac =

 =

% Regulation =

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CONCLUSION:

QUESTIONS

1. What is a rectifier?
2. How many types of rectifiers are there?
3. Explain Ripple factor, Regulation and their significance.
4. What are the applications of rectifiers?
5. Which type of transformer are you using: Step-up or step-down? Why?
6. What are the ratings of the transformer?
7. What is the function of a transformer? Which type are we using for this
experiment?
8. List the outcomes of this experiment

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Experiment No: 4
FULL WAVE RECTIFIER WITH CAPACITOR FILTER
AIM: To determine the following parameters for a full wave rectifier circuit with
capacitor filters.
1. Ripple factor,
2. Variation in % regulation
3. To observe the o/p on DSO.

APPARATUS:

1. Ammeters 0-100mA 1No.

2. Digital multi-meter 1No.
3. Decade resistance box 1No.
4. Decade inductance box 1No

COMPONENTS:

1. Diode 1N4007 2 No.

2. Capacitors 1000µF / 63V 1 No.
3. Transformer 230V / 16-0-16 V, 0.5A, 1No.

THEORY:

Full wave rectifier:

The circuit of the full wave rectifier is shown below. This circuit is seen to comprise
two half-wave circuits connected so that conduction takes place through one diode
during one half cycle and thorough other diode during the second half of the cycle.

A most popular filter circuit is a capacitor filter circuit is shown below.

AC input
Rectifier Capacitor DC load RL
circuit filter

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The action of this system depends upon the fact that the capacitors stores energy
during the conduction period and delivers this energy to the load during the non-
conducting period. In this way the time during which the current passes through the
load is prolonged, and the ripple is considerably decreased.

The diode will be forward biased (short circuited) when the transformer voltage vi
exceeds the capacitor voltage, then the capacitor starts charging in stepping with
applied voltage.

The diode will be reverse biased (open circuited) when the transformer voltage vi falls
below the capacitor voltage. Then the capacitor starts discharging through the load
resistor.

Let the capacitor is initially charged during the first quarter cycle the diode conducts
and the capacitor charges with input voltage up to vo = vm . When vi is falls below vm
the diode is not conducting the capacitor discharges at slower rate than input voltage.
If the time constant RLC is large as compared period of input waveform the discharge
is slow.

Ripple factor:

The filtered output has a DC value and some ac variations (ripple). These smaller the
ac variation with respect to the DC level the better the filter circuit operation.
The filter voltage waveform with DC and ripple voltages is shown below.

rmsvalueofaccomponentofasignal V rms
Ripplefactor ( )  
averagevalueofasignal V dc
Voltage regulation:

The variation of dc output as a function of dc load current is called regulation. The

percentage regulation is given as

% regulation = V no load – V load  100%

V load
V no load  dc output voltage under zero load current (RL= )
V load  dc output voltage at normal load current at which regulation is
determined.

For ideal power supply the output voltage is independent of the load current or the
load resistance and the percentage regulation is zero.

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FULL WAVE RECTIFIER WITH FILTER

CIRCUIT DIAGRAM:
1N4007
0-100mA
+ A

+ +
1000F
V
230V,50Hz

DMM DRB
AC supply

63V
N2 - -
N3

1N4007

PROCEDURE:

1. Connect the circuit as shown in the diagram.

2. Give input from AC mains and measure the secondary voltage Vs of the
transformer.
3. Measure the no load DC voltage using DMM. Let this be VNL.
4. Now connect the DRB. Vary the DRB and note the values of Idc, in steps of
10mA until the current reaches 100mA.
5. At each step measure the VDC and VAC. Calculate ripple factor  as the ratio of
VAC/ VDC.

OBSERVATIONS:

VNL=
% regulation
RL= VDC / =
S.No IDC VDC VAC VNL-VDC × 100
IDC VAC/VDC
VDC

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RESULTS:

With Filter:

Plot the graphs of VDC vs IDC,  vs IDC and % regulation vs IDC

VDC =

Vac =

 =

% Regulation =

CONCLUSION:

QUESTIONS

1. What is a rectifier? What is a filter?

2. How many types of rectifiers are there?
3. How many types of filters are there? Compare them.
4. Explain Ripple factor, Regulation and their significance.
5. What are the applications of rectifiers?
6. Which type of transformer are you using: Step-up or step-down? Why?
7. What are the ratings of the transformer?
8. Why does ripple factor is good for full wave rectifier than the half wave rectifier?
9. Compare half wave rectifier, Full wave rectifier and Bridge rectifier.
10. What is the function of a transformer? Which type are we using for this
experiment?
11. List the outcomes of this experiment

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Experiment No: 5

NON LINEAR WAVE SHAPING - CLIPPERS

AIM : To study the clipping circuits for the given reference voltage and
to verify their response.

COMPONENTS:
1. Resistors - 1K
2. IN4007 Diode – 2No.

APPARATUS :
1. Bread board.
2. DSO (1Hz- 20MHz)
3. Function Generator(1Hz-1MHz)
4. Power supply(0-30V)
5. Connecting wires.
THEORY:

The non-linear semiconductor diode in combination with resistor can function

as clipper circuit. Energy storage circuit components are not required in the basic
process of clipping.

These circuits will select part of an arbitrary waveform which lies above or
below some particular reference voltage level and that selected part of the waveform
is used for transmission. So they are referred as voltage limiters, current limiters,
amplitude selectors or slicers.

There are three different types of clipping circuits.

1) Positive Clipping circuit.
2) Negative Clipping.
3) Positive and Negative Clipping ( slicer ).

In positive clipping circuit positive cycle of Sinusoidal signal is clipped and

negative portion of sinusoidal signal is obtained in the output of reference voltage is
added, instead of complete positive cycle that portion of the positive cycle which is
above the reference voltage value is clipped.

In negative clipping circuit instead of positive portion of sinusoidal signal,

negative portion is clipped.
In slicer both positive and negative portions of the sinusoidal signal are
clipped.

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CIRCUIT DIAGRAMS
I. Positive Clipping 1 KΩ

Vi IN 4007 V0

Fig: 5a
Vi

Fig: 5(b). Input waveform Fig: 5(c)Output waveform.

Vi is a input sinusoidal signal as shown in the figure 5(a) . For positive portion
of the sinusoidal the diode IN4007 gets forward biased. The output voltages in the
voltage across the diode under forward biased which is cut-in-voltage of the diode.
Therefore the positive portion above the cut-in-voltage is clipped or not observed in
the output (V0) as shown in figure 5(b).

II. Positive Clipping with Positive Reference Voltage

1 KΩ

IN 4007
Vi V0

VR

Fig:5d
Vi

Fig:5(e). Input waveform Fig:5(f). Output waveform.

The input sinusoidal signal (Vi ) in figure 8(a) can make the diode to conduct
when its instantaneous value is greater than VR. Up to that voltage (VR) the diode is
open circuited and the output voltage is same as the input voltage. After that voltage

M.V.G.R.College Of Engineering(A) 23
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(VR) the output voltage is VR plus the cut-in-voltage (V ) of the diode as shown in
figure 8(b).

IV Negative Clipping Circuit

1 KΩ

Vi IN 4007 V0

Fig:5g.
Vi

Fig:5(h). Input waveform Fig:5(i). Output waveform.

For this portion of the input sinusoidal signal (Vi), the diode gets reverse biased and it
is open. Then the output voltage is same as input voltage. For the negative portion of
the signal the diode gets forward biased and the output voltage is the cut-in-voltage (-
V ) of the diode. Then the input sinusoidal variation is not seen in the output.
Therefore the negative portion of the input sinusoidal signal (Vi) is clipped in the
output signal ( V0 ).

V. Negative Clipping with Negative Reference Voltage

1 KΩ

IN 4007
Vi V0

VR

Fig:5(j)
Vi

Fig:5k). Input waveform. Fig:5(l) Output waveform.

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In this circuit, the diode gets forward biased for the input sinusoidal voltage is
less than (–VR). For input voltage greater than (–VR), the diode is non-conducting and
it is open. Then the output voltage is same as input voltage.

PROCEDURE:
1. Connect the circuit as shown in the figure 5a.
2. Connect the function generator at the input terminals and DSO at the
output terminals of the circuit.
3. Apply a sine wave signal of frequency 1KHz, Amplitude greater than the
voltage at the input and observe the output waveforms of the circuits.
4. Repeat the procedure for Fig 5a, 5d,5g and 5j.

CONCLUSION:

Conclusion can be made on theoretical and practical values of cut in voltage of

diode and also made on theoretical and practical output wave forms for
different reference voltages

QUESTIONS:
1. What is a clipper? Describe (i) Positive clipper (ii) Biased clipper (iii)
Combination clipper.
2. Discuss the differences between shunt and series clipper.

M.V.G.R.College Of Engineering(A) 25
Department of Electronics and Communication Engineering Basic Electronics Lab

Experiment No: 6

NON LINEAR WAVE SHAPING – CLAMPERS

AIM : To study the clampling circuits for given reference voltages and to verify
their responses.

COMPONENTS:

1. Resistors - 1k
2. IN4007 Diode
3. Capacitor -10F

APPARATUS:

1. Bread board
2. Function generator (1Hz – 1Mz)
3. DSO (1Hz- 20MHz)
4. Power supply (0-30V)
5. Connecting Wires.

THEORY:

Clamping Circuit
“A clamping circuit is one that takes an input waveform and provides an
output that is a faithful replica of its shape but has one edge tightly clamped to the
zero voltage reference point”.

There are various types of Clamping circuits, which are mentioned below:

1. Positive Clamping Circuit.

2. Negative Clamping Circuit.
3. Positive Clamping with positive reference voltage.
4. Negative Clamping with negative reference voltage
Negative Clamping Circuit
VA
+
+ -
C

Vi D V0

-
Fig: 6a
The input signal is a sinusoidal which begins at t=0. The capacitor C is
charged at t = 0. The waveform across the diode at various instant is studied.

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During the first quarter cycle the input signal rises from zero to the maximum
value Vm. The diode being ideal, no forward voltage may appear across it. During this
first quarter cycle the capacitor voltage VA = Vi. The voltage across C rises
sinusoidally, the capacitor is charged through the series combination of the signal
source and the diode. Throughout this first quarter cycle the output V0 has remained
zero. At the end of this quarter cycle there exists across the capacitor a voltage VA =
Vm.

After the first quarter cycle, the peak has been passed and the input signal
begins to fall, the voltage VA across the capacitor is no longer able to follow the input
voltage. For in order to do so, it would be required that the capacitor discharge, and
because of the diode, such a discharge is not possible. The capacitor remains charged
to the voltage VA = Vm, and, after the first quarter cycle the output is V0 = Vi – Vm.
During succeeding cycles the positive excursion of the signal just barely reaches zero.
The diode need never again conduct, and the positive extremity of the signal has been
clamped to zero. The average value of the signal is –Vm.
Positive Clamping Circuit:
Vm
+ +
+ -
C

Vi D V0

- -
Fig: 6b

It is also called as negative peak clamper, because this circuit clamps at the
negative peaks of a signal.
Let the input signal be Vi = Vm sint. When Vi goes negative, diode gets
forward biased and conducts. The capacitor charges to voltage Vm, with polarity as
shown. Under steady state condition, the positive clamping circuit is given as,

V0  Vi  (Vm )

V0  Vi  Vm
Eq.1

During the negative half cycle of Vi, the diode conducts and C charges to –Vm
volts, i.e., the negative peak value. The capacitor cannot discharge since the diode
cannot conduct in the reverse direction. Thus the capacitor acts as a battery of –Vm
volts and the output voltage is given by equation.1 above. It is seen for figure 2, that
the negative peaks of the input signal are clamped to zero level. Peak-to-peak
amplitude of output voltage 2Vm, which is the same as that of the input signal.

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I. Negative Clamping

Fig:6c

Vi V0
Vm

t t
-Vm

-2Vm

Fig:6 (d).Input waveform Fig:6(e) Output waveform.

II. Negative Clamping with Negative Reference Voltage.

Fig:6f

Fig:6 (g).Input waveform Fig:6 (h) Output waveform.

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IV. Positive Clamping.

Fig:6i

2Vm
Vi
Vm V0
t t

-Vm

Fig:6 (j).Input waveform Fig:6 (k) Output waveform.

V. Positive Clamping with Positive reference Voltage.

Fig: 6l
Vi

t V0
VR
t

Fig:6 (m).Input waveform Fig:6 (n) Output waveform.

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PROCEDURE:
1. Connect the circuit as shown in the figure 6a.
2. Connect the function generator at the input terminals and DSO at the
output terminals of the circuit.
3. Apply a sine wave greater than the reference voltage, and signal of
frequency 1kHz at the input and observe the output waveforms of the
circuits in DSO.
4. Repeat the above procedure for the different circuit diagram as shown inf
figure 6b,6c,6f, 6i and 6l.

CONCLUSION:

QUESTIONS:
1. Explain the operation of a clamping circuit for a square wave input.
2. Differentiate the clippers with clampers.
3. Give the applications of clampers.

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Experiment No: 7

DESIGN OF RC LOW PASS FILTER/RC HIGH PASS FILTER

AIM : a) To design and observe the response of RC Low pass circuit for a square
wave input for time constant RC<<T and to determine rise time for RC<<T.
b) To Design and observe the response of RC High pass circuit for a square
input for time RC = T and to determine percentage tilt for RC = T.

COMPONENTS:
1. Resistors - 10k, 100 k, 1M
2. Capacitor - 0.01F

APPARATUS:
1. Bread Board.
2. DSO (1Hz- 20MHz)
3. Function Generator(1Hz-1MHz)
4. Connecting Wires.

THEORY:

a) RC Low Pass Circuit :

The resistor in series arm and capacitor in the shunt arm, The resulting
circuit is called Low pass circuit
R

Vi C V0

Fig 7a: RC Low Pass Circuit.

The circuit passes low frequencies readily but attenuates high frequencies
because the reactance of the capacitor decreases with increasing frequency. At very
high frequencies the capacitor acts as a virtual short circuit and the output falls to
zero. This circuit also works as integrating circuit. A circuit in which the output
voltage is proportional to the integral of the input voltage is known as integrating
circuit. The condition for integrating circuit is RC value must be much greater than
the time period of the input wave (RC>>T)

Let Vi = alternating input voltage.

i = resulting current

Applying Kirchoff‟s Voltage Law to RC low pass circuit (fig.1).

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T
1
C o
Vi  iR  i.dt

Multiplying throughout by C, we get

T
CVi  iRC   i.dt
o
T
As RC >> T, the term  i.dt may be neglected
o

 CVi  iRC

Integrating with respect to T on both sides, we get

T T

 CV .dt  RC  i.dt
0
i
0
T t
1 1
C0 i.dt 
RC 0
Vi .dt

T
1
V0   i.dt
C0
t
1
RC 0
 V0  Vi .dt

The output voltage is proportional to the integral of the input voltage.

EXPECTED GRAPH:

V0
RC=T
0

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b) High Pass Circuit.

The Capacitor in series arm and resistor in the shunt arm, the resulting circuit
is called High pass circuit
C

Vi R V0

Fig: 7b. RC High Pass Circuit.

The higher frequency components in the input signal appears at the output
with less attenuation than the lower frequency components because the reactance of
the capacitor decreases with increase in frequency. This circuit works as a differential
circuit. A circuit in which the output voltage is proportional to the derivative of the
input voltage is known as differential circuit. The condition for differential circuit is
RC value must be much smaller then the time period of the input wave (RC<<T).

Applying Kirchoff‟s Voltage Law to RC high pass circuit (fig.2)

T
1
C o
Vi  i.dt  iR .

Divide throughout by R
T
Vi 1
R RC o
 i.dt  i .

As RC << T, the above equation is modified as

T
Vi 1
R RC o
 i.dt

Differentiating above equation with respect to T.

1 d 1
Vi  .i
R dt RC

d
RC Vi  iR
dt

V 0  iR
d d
Therefore V0  RC Vi . V0  Vi
dt dt

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EXPECTED GRAPHS:
Vi

V0 V1
V 11
V RC=T
t
V0
RC<<T
t
V00
V
V1 RC>>T

DESIGN:

1. Choose T = 1msec.
2. Select C = 0.01 F.
3. For RC = T; select R.
4. For RC >> T; select R.
5. For RC << T; select R.
6. If RC << T, the High pass circuit works as a differentiator.
7. If RC >> T, the Low pass circuit works as an integrator.
PROCEDURE:

1. Connect the circuit as shown in the Fig. 7a &7b.

2. Connect the function generator at the input terminals and DSO at the
output terminals of the circuit.
3. Apply a square wave signal of frequency 1KHz at the input. (T = 1
msec.)
4. Observe the output waveform of the circuit for different time
constants.
5. Calculate the rise time for low pass filter and tilt for high pass filter
and compare with the theoretical values.
6. For low pass filter select rise time (tr) = 2.2 RC (theoretical). The rise
time is defined as the time taken by the output voltage to rise from 0.1
to 0.9 of its final value.
7. % tilt = ( T/2RC )  100 ( theoretical)
% tilt = [ ( V1 – V1 ) / ( V / 2 ) ]  100 ( practical)

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CONCLUSIONS:

Low pass filter:

High pass filter:

QUESTIONS:

1. What is meant by linear wave shaping?

2. Derive the expression for the generalized single time constant transient of a series
RC circuit?
3. Derive the expression for the Rise time and % of tilt?

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Experiment No: 8

TRANSISTOR CE CHARACTERISTICS
AIM: To obtain the input and output characteristics of a given transistor in CE
configuration.

APPARATUS:
1. Power supplies 0-30V 2Nos.
2. Ammeters 0-1mA, 1 No.
0- 10 mA, 1 No.
0-100mA 1 No.
3. Voltmeters 0-1V 1 No.
0-30V 1 No.

COMPONENTS:
1. Transistor BC 547 1No.
2. Resistor 1K 1No.

THEORY:
Input characteristics
VCE=1V

VCE=2V
VCE=0V

IB

VBE

The input characteristic is the plot of the input current IB Vs input voltage VBE for a
range of values of output voltage VCE.
With VCE = 0 and emitter junction forward biased, the input characteristic is
essentially that of a forward bias. As VCE increases with constant VBE, it causes a
decrease in base width and results in a decreasing recombination base current.
Output Characteristics
The output characteristics are a plot of the output current IC versus output voltage VCE
for a range of values of input current
IC IB.
IB=600A
SATURATION REGION

IB=550A

ACTIVE REGION
IB=500A

IB=0A

VCE
CUTOFF REGION
ICEO = ICBO
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Active Region
In the active region the collector junction is reversed biased and emitter
junction is forward biased. In this region the transistor output current IC responds most
sensitively to an input signal.
In the active region the output characteristic IC is given by
IC = IB + (1+) ICO.
Note that IB >>ICO, and hence IC IB in the active region.
The curves of the output characteristics are not as horizontal as those of the output
characteristics in the common base configuration.
Assume that, because of the early effect , increases by only one half of 1%
from 0.98 to 0.985, as VCE increases from a few volts to 10 volts, then the value of
Beta increases from (0.98/1-0.98) = 49 to (0.985/1-0985) = 66, or about 34%. This
numerical example illustrates that a very small change in  reflects a very large
change in the value of , and hence upon the common emitter curves.

Cut-off region
The cut-off region is defined as the condition where the collector current is
equal to the reverse saturation current ICO and the emitter current is zero. For the
transistor to be in cut-off , IE=0, IC=ICO,IB = -IC = -ICO, and VBE is a reverse voltage
whose magnitude is of the order of 0.1V for germanium and 0 V for silicon transistor.

Saturation region
In the saturation region the collector junction and emitter junction are forward
biased by at least the cut-in voltage (V). Since the voltages VBE and VBC across a
forward biased emitter junction and collector junction have a magnitude of only a few
tenths of a volt (V), VCE = VBE - VBC = zero, (ideal) or VCE = few tenths of the volt
(practical ) at saturation. Hence, in output characteristics the saturation region is very
close to zero voltage axis.
In saturation region the collector current is approximately equal to base current, for
given values of VCC and RC.

CIRCUIT DIAGRAM
0-100mA
A
- +
1KΩ 0-10 mA BC547
A + +
+ - 0-30V 0-30V
+ + V
- -
0-30V V
- 0-1V
-

0-100mA
INPUT CHARACTERISTICS
- A +
0-1 mA
1KΩ BC547
A + +
+ - 0-30V
+ + V 0-30V
0-30V - -
V 0-1V
-
-

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Department of Electronics and Communication Engineering Basic Electronics Lab

PROCEDURE:

Input Characteristics:

1. Connect the circuit as shown in the diagram. Keep the VCE 0V(constant). Increase the VBE
and observe the IB for different values of VBE.

2. Tabulate the results. Plot the graph VBE Vs IB. Repeat the experiment for VCE = 1V & VCE
= 2V.

Output Characteristics:

1. Starting with Vbb = 0, increase it to get IB = 500uA. Then increase the VCC in steps and
note down the values of IC, without exceeding the rated values.

2. Tabulate the results. Repeat for different values of IB , say 550A & 600A and draw the
family of characteristics.

OBSERVATIONS:
S.No VCE VCE VCE S.No IB IB IB
VBE IB VBE IB VBE IB IC VCE IC VCE IC VCE

Input characteristics output characteristics

RESULTS:

CONCLUSIONS:

QUESTIONS

1. What is ICBO, and how does it varies with temperature.

2. What should be the value of the VBE to keep the transistor in the cut-off. (both Ge and
Si)
3. What is the order of magnitude of the temperature co-efficient of VBE(SAT), VBC(SAT), and
VCE(SAT)?
4. Is  VBE(SAT), greater or less than  VCE(SAT),? Explain.
5. Why do the O/P characteristics of CE configuration are not as horizontal as those of C.B
configuration O/P characteristics?

M.V.G.R.College Of Engineering(A) 38
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Experiment No: 9

COMMON EMITTER AMPLIFIER FREQUENCY RESPONSE

AIM: To plot the frequency response and to determine the bandwidth of the CE
amplifier.

APPARATUS:

1. Power supply 0-30V 1 No.

2. DSO 1 No.
3. Digital multimeter. 1 No.
4. Signal generator 1 No.

COMPONENTS:

1. Resistors 220 1No.

other resistors of designed values.
2. Capacitors 10 µF 2Nos
100µF 1No.
3. Transistors BC 547 1No.

THEORY
Amplifiers:
An amplifier is a circuit where output signal is at a higher level of
energy than input and faithfully reproduce the input waveform.
The device which can be used as an amplifier should have Ideal controlled
source characteristics
The BJT and FET have controlled source characteristics in the active region
and pinch of regions respectively. These are biased in their appropriate regions by
means of externally applied direct voltages or current (biasing). i.e., these controlled
sources establish operating point (Quiescent point). And time varying input signal is
superimposed on the quiescent level to produce time varying output signal.

Multistage Amplifiers
A number of stages can be used in cascade to amplify a signal from source, the
microphone, to a level which is suitable for the operation of another transducers, such
as loud speakers. These cascaded amplifiers are called multistage amplifiers. The
overall gain of the multistage amplifier is equal to product of the individual gain.

Quiescent point (operating point or Q point)

The co-ordinates of IC, VCE with no signal is applied is called as operating point. The
operating point is a fixed point as the characteristics. So it is called Quiescent point
(Q-point).
When no signal is applied, the power supply (Vcc) establishes a fixed level of
current and voltages (IC and VCE). For transistor amplifiers this resulting DC current
and voltages establishes an operating point on the characteristics that define the region
that will be employed for the amplification of the signal.
For amplification, the Q-point should be selected in the middle of the active
region. When time varying input signal is applied, the Q point moves towards

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saturation and cut-off regions. We have to choose the operating point in such way
that, for the entire range of input signal the Q-point should not be entered into the
saturation and cutoff regions for faithful amplification.

Biasing:
The process of establishing the operating point in the active region by means
of a fixed power supply is called biasing. The biasing is necessary to operate the
transistor in the active region for the entire range of input signal, so that a faithful
amplification results. If no biasing or no proper biasing is applied, the transistor may
be saturated or cutoff and the output will be clipped off.
Frequency response.
It is the plot which gives the relation between the gain of the amplifier and
frequency.
The frequency distortion occurs when the signal components of different
frequencies amplified differently. This distortion may be caused by the internal device
capacitances, coupling components or the load (of reactive). Under these conditions,
the gain A is a complex number, whose magnitude and phase angle depend upon the
frequency of the input signal.
If the frequency response characteristics is not a horizontal straight line over
the range of frequencies under consideration, the amplifier is said to have frequency
distortion over these range.

Bandwidth
For an amplifier stage the frequency characteristic may be divided into three
regions.
1. Mid band : This is a range, over which the amplification is reasonable constant
and equal to Ao.
2. Low frequency region: In this region, below mid band, an amplifier stage may
behave like a high pass circuit.
3. High frequency region: In this region, above mid band, an amplifier stag may
behave like a simple low pass circuit.

Lower cutoff or lower 3dB frequency ( FL )

It is the frequency (in low frequency region) at which the gain becomes 1/ 2
times its mid band value. It can also be defined as (if gain is expressed in decibels)the
frequency at which the gain is reduced by 3 decibels from mid band value.

Upper cutoff frequency or upper 3 dB frequency (FH)

It is the frequency (in high frequency region) at which the gain is reduced to
1/2 times its mid band value.
The frequency range from FL to FL is called the bandwidth of the amplifier
stage. We may anticipate in general way that a signal whose frequency range lie
within the range of FL to FH will pass through the stage without distortion.
Decibels:
The power gain in decibels is obtained by AdB = 10log10(Po / Pi )
where Po = output power
Pi = input power
VdB = 20log10(Vo / Vi )
where Vo = output voltage
Vi = input voltage

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CE amplifier:
The CE amplifier is having a voltage and current gain greater than unity. The
values of input resistance Ri and output resistance Ro lie between those for CB and
CC amplifiers. The CE amplifier in this laboratory uses self biasing or emitter biasing
configuration. The power supply Vcc, resistors R1, R2, RC provide the biasing. The
emitter resistor RE is meant for stabilization. The coupling capacitor blocks the DC
voltages but freely passes the signal voltages. If the input coupling capacitor C 1 is not
used, the dc or average value of the signal source may offer the biasing of the
amplifier. The output signal voltage may be applied to the input of another amplifier
without effecting its bias, because of the blocking capacitor C2 . The emitter resistor
RE provides stabilization as follows. If Ic tends to increase.(let ICO has risen due to
increase in temperature). The current in RE is IE = IC + IB also increases. The
voltage drop across RE also increases and the drop is in the direction to reverse bias
the emitter junction so that the base current is decreased. Finally the collector current,
IC decreases. Hence IC will increase less than it would have, had there been no self
biasing resistor RE.
The Bypass capacitor CE is mainly used to prevent the loss of amplification
due to negative feedback provided by the RE . This bypass capacitor will effect the
low frequency response of the amplifier.

CIRCUIT DIAGRAM:

+
VCC = 12V

R1 RC
C2 = 10F

+ -

RS 220Ω C1 10F
BC 547 +
+ -

DRB
+ CRO
Signal
Generator +
R2 RE CE 100F
-

PROCEDURE:

1. Connect the circuit with component values calculated.

2. Verify the co-ordinates of operating points and note down any deviations from the
designed values (VCEQ, ICQ and VBE).
3. Connect the signal generator with a sine wave of 1KHz frequency to the input and increase
the input to such a level that the output waveform of the signal as observed on CRO is not
distorted.

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4. Vary the frequency of the input signal from 50Hz to 1MHz in suitable steps and calculate
gain at each step. Plot the graph between gain in dB Vs frequency. Note down the half power
points and find the bandwidth of the amplifier.
5. Observe the phase relation between input and output signals at different frequencies.

MODEL GRAPHS:

AV Max
3dB point

Bandwidth

Frequency

TABULATION:

S.No Frequency Input Voltage Output Voltage Gain Gain in Decibels (dB)
Vi V0 V
AV  0 20  log 10 AV
Vi

1 50 Hz
2 100 Hz
. 200 Hz
. 500 Hz
. 800 Hz
. 1k Hz
. 2k Hz
.
.
.
1MHz

RESULTS:
Bandwidth. =

QUESTIONS:

1. Why should we use CE amplifier in the intermediate stage of multistage amplifiers?

2. In active region the transistor acts as a current controlled current source and so that it can
be used as an amplifier. Explain?
3. Why is a capacitor coupling is used to connect a signal source to an amplifier?
4. Why does the gain of the amplifier vary with the frequency?
5. How the CE amplifier does produce 1800 phase shift between output and input?

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Experiment No: 10

OP AMP APPLICATIONS
AIM: To design circuits using op-amps for performing mathematical operations such
as addition, subtraction and comparison.

OUTCOMES

APPARATUS:
1. Operational Amplifier A 741 IC –1No. 2. Resistors of designed values.
3. Power supply (0-30V) 4. Multi meter
5. Bread board 6. DSO (20MHz/30MHz)

CIRCUIT DIAGRAM:
1. ADDER:

Ra

Rb V+

Rc

V-

Fig. 10a Inverting Configuration

Fig. 10b Non Inverting Configuration

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2. SUBTRACTOR:

+VCC

VO = V2 – V1
-VEE

Fig. 10c: Subtractor

THEORY:
1. SUMMING AMPLIFIERS
(A)Inverting configuration

Fig. 10a shows the inverting configuration with

three inputs Va, Vb, and Vc using input resistors
Ra, Rb, and Rc. The circuit can be used as a
summing amplifier, scaling amplifier, or
averaging amplifier. The circuit‟s function can
be verified by examining the expression for the
output voltage Vo, which is obtained from Kirchhoff‟s current equation written at
node V2.
Referring to Fig, Ia + Ib + Ic = IB + IF
Since Ri and gain A of the op-amp are ideally infinity, IB = 0A and V1 = V2 0V.
Therefore,
Va Vb Vc V
   o
Ra Rb Rc RF
R R R 
Vo   F Va  F Vb  F  ---- 1
 Ra Rb Rc 
Summing amplifier:
For example, in the circuit of Fig 10a, Ra = Rb = Rc = R, then equation (1) can be
rewritten as
RF
Vo   Va  Vb  Vc 
R
This means that the output voltage is equal to the negative sum of all the inputs times
the gain of the circuit RF/R: Hence the circuit is called a summing amplifier.
(B) Non inverting Configuration:

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If input voltage sources and resistors are connected to the non-inverting

terminal as shown in Fig, the circuit can be used either as a summing or averaging
amplifier through selection of appropriate values of resistors, that is, R1 and RF.
Using the superposition theorem, the voltage V1 at the non-inverting terminal
is
R R R
V1  2 Va  2 Vb  2 V
c
R R R R RR
2 2 2

Va Vb Vc Va  Vb  Vc
V1     ---- 2
3 3 3 3
 R 
Hence the output voltage is Vo = 1  F V1
 R1 
 R  V  Vb  Vc
= 1  F  a
 R1  3
Summing amplifier:
A close examination of equation (2) reveals that if the gain (1+RF/R1) is equal to the
number of inputs, the output voltage becomes equal to the sum of all input voltages.
That is, if (1+RF/R1) = 3. (From equation (1)),
Vo = Va + Vb +Vc
Hence the circuit is called a non-inverting summing amplifier.

2. SUBTRACTOR:
A basic differential amplifier can be used as a subtractor as shown in Fig. 10c. In this
Figure, input signals can be scaled to the desired values by selecting appropriate
values for the external resistors; when this is done, the circuit is referred to as scaling
amplifier. However, in the Fig. all external resistors are equal in value, so the gain of
the amplifier is equal to 1. From the Fig10.c, the output voltage of the differential
amplifier with a gain of 1 is
RVa  Vb 
V0  
R
That is, V0  Vb  Va

Thus the output voltage V0 is equal to the voltage applied to the non-inverting
terminal (Vb) minus the voltage applied to the inverting terminal (Va), hence the
circuit is called a subtractor.

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Department of Electronics and Communication Engineering Basic Electronics Lab

PROCEDURE:
ADDER:

SUBTRACTOR:

OBSERVATIONS:
ADDER:
Inverting Configuration:
S.No Input Output
Va (V) Vb (V) Vc (V) Theoretical (V) Practical (V)
1
2
3

Non-Inverting Configuration:
S.No Input Output
Va (V) Vb (V) Vc (V) Theoretical (V) Practical (V)
1
2
3

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SUBTRACTOR:
S.No Input Output
Va (V) Vb (V) Theoretical (V) Practical (V)
1
2
3

RESULT:
ADDER:
Non-inverting amplifier

Inverting amplifier

SUBTRACTOR

CONCLUSIONS:

QUESTIONS:
1. What is an IC?
2. What are the AC characteristics of an Op-Amp?
3. What are the DC characteristics of an Op-Amp?
4. What is a monolithic IC?
5. What is a linear IC?

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Experiment No: 11

RC PHASE SHIFT OSCILLATOR

AIM: To study the performance of the RC phase shift Oscillator and to measure the
phase shift at each stage and also the frequency.

APPARATUS:

Power supply 0-30V 1 No.

DSO 20MHz 1 No.
Digital Multimeter. 1 No.

COMPONENTS:

Resistors As per designed values

Capacitors As per designed values
100µF 1 No.
Potentiometer 1K 1 No.
Transistors BC 547 1 No.

THEORY:

The RC Phase shift Oscillator consists of transistor amplifier and three

cascaded (series) RC sections. The output of the last RC combination being returned
to the base of the transistor. If the loading of the phase shift network on the amplifier
can be neglected. The amplifier introduces 1800 Phase shift to the voltage which
appears on the base. The Three RC sections will give additional phase shift, at some
frequency the phase shift introduced by the RC network will be equal to 180 0, at this
frequency the total phase shift from the base around the circuit and back to the base
will be exactly zero. This particular frequency will be the one at which the circuit will
oscillates, provided the magnitude of amplification is sufficiently large. The
frequency of oscillation is given by
F =(1 / 2RC)  1 / (6 +4K).
Where K = RC / R.
The requirement is that the magnitude of A must exceed unity. In order for
oscillations to start, the circuit needs the condition
hFE > 4k+23+(29/K)
The phase shift oscillator is particularly suited to the range of audio
frequencies. At frequencies in the range of mega hertz, has no marked advantage over
circuits employing tuned LC networks. The frequency of oscillations can be varied by
changing any one of the impedance elements ( R or C ) in the phase shifting networks.

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CIRCUIT DIAGRAM
VCC

RC
C C C
R1 B C D
A
0.1f 0.1f 0.1f
1K POT
BC 547
R R

R2 RE CE
100f

RC PHASE SHIFT OSCILLATOR

PROCEDURE:
1. Connect the circuit as shown in the figure.
2. First check the amplifier section (i.e., find out the operating points)
3. Adjust the potentiometer such that oscillations are sustained. Monitor the
output waveform using CRO.
4. Measure the voltages at each RC section.
5. Measure the phase shift introduced by each section forming Lissajous figures.
Use the sine wave at reference voltage.
6. Measure the waveform frequency and compare it with theoretical value.

Measurement of phase shift using Lissajous figures:

y x
  sin 1 1  sin 1 1
y2 x2 Y Major
Axis

x
x
2
1

x
x1
2

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RESULTS:
Phase shift for 1st stage (A and B) =
Phase shift for 2nd stage (B and C) =
Phase shift for 3rd stage (C and D) =
Overall phase shift =
Practical frequency =

CONCLUSIONS:

QUESTIONS :
1. How the Barkhausen Criteria is satisfied in the RC phase-shift oscillator?
2. How do you vary the frequency of the RC phase-shift oscillator?
3. What is the maximum phase-shift that can be obtained by a single RC section?
4. Under what conditions the amplifier behaves as an oscillator?
5. What is the frequency range that can be obtained by the RC phase shift
oscillator?

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Experiment No: 12

SCR CHARACTERISTICS
AIM: To draw the forward and reverse characteristics of SCR.

APPARATUS:
1. Power supply (dual channel) 0-30V 1 No.
2. Voltmeters 0-30V 2 Nos
3. Ammeters 0-10mA 1 No
0-100mA 1 No

COMPONENTS:

1. Resistors – (1K -2 No.)

2. SCR TYN – 64

THEORY:
The structure of silicon controlled rectifier (SCR) consists of four alternate p
and n type layers. The name “Silicon Controlled Rectifier” indicates that the SCR is a
rectifier constructed of silicon material with a third terminal for control purposes. This
third terminal in the SCR, called a gate, determines when the rectifier switches from
the open circuit to short circuit state. The graphic symbol for SCR is shown below.

IA IGT Gate TYN 604

Anode Cathode
+ -
VF
Cathode Anode Gate

Silicon Controlled Rectifier TYN 604

The volt-ampere characteristics

The volt–ampere characteristic of an SCR is shown for various gate currents. We can
observe from the characteristics that the firing voltage is decreasing with increasing
gate current. In fact the „‟ increases with increasing gate current, thus the breakover
(firing) voltage decreases.
The anode current after breakdown may be larger by a factor of 1000 than the current
before breakdown. When the gate current is very large, breakover may occur at low
voltage, the characteristic has the appearance of a simple p-n diode.

Forward breakover voltage (VBO), is that voltage above which the SCR enters the
conduction region (on state).
Holding current(IH) , is that value of current below which the SCR switches from
the conduction state to the forward blocking region( off state).
Holding voltage(VH), is that voltage required to turn off the SCR.

SCR is used in relay control, motor control, phase control, heater control, battery
chargers, inverters, regulated power supplies and static switches.

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IA

VH

IG2> IG1>0
IG2 IG1 IG = 0

IH
IG Large
VA
VFBO

CIRCUIT DIAGRAM:

0-100mA
1K + -
A

TYN 604 0-10mA

+ +
1K
V1 V 0-30V - A +
- - 0-30V

SCR FORWARD CHARACTERISCTICS

0-500uA
1K + -
A

TYN 604
+ +
V1 V 0-30V
- -

SCR REVERSE CHARACTERISCTICS

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PROCEDURE:
Forward characteristics:
1. Connect the circuit as shown below.
2. Keep the gate voltage to Zero and increase the input voltage from zero to 15, not
down the corresponding ammeter readings IA and VA
3. Set the gate voltage to 10V and increase the anode voltage from 0 to say 15Volts,
and observe that at a particular anode voltage the anode current shoots-off, resulting
the anode voltage falls towards zero (SCR firing).
4. If it does not happened, repeat the above step till you observe the firing.
5. Note down the value of IG at which the Firing happens.
6. Now slightly increase(decrease) by 0.1V of gate voltage and note down the values
of IA for different values of VA stating from zero to VBO and beyond.
7. Plot the graph VA VS IA for different values of IG.

Reverse Characteristics:
1. Connect the circuit as shown in the figure.
2. Increase the anode voltage V1 from zero to 20V in steps of 1V.
3. Note down the anode current IA for every step of VA.
4. Plot the graph VA VS IA

Tabulation for Forward characteristics:

IG= IG= IG=
S.No
VA IA VA IA VA IA

Tabulation for Reverse characteristics:

S. No VA IA

RESULTS :

VH =
IH =

QUESTIONS:
1. What are the applications of SCR.
2. Does SCR works as a switch?

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Experiment No: 13

IMPLEMENTING AMPLITUDE DEMODULATION USING

DIODE DETECTOR
AIM
To study the Process of Amplitude demodulation of the Amplitude modulated wave.
APPARATUS
a. Experimental boards of Amplitude modulation
b. DSO.
THEORY
AMPLITUDE DEMODULATION
The extraction of the modulating signal from an AM signal can be carried out
using the envelop detector. The most common envelop detector consists of a diode
followed by RC filter. Its operation is analogous to the one of a half-wave rectifier, as
the output voltage follows the maximum values of the carrier. As the amplitude of the
carrier is variable, by properly choosing R and C, the output of the detector can be
faithfully reproduced.
LAST CONDITIONS ON THE CHOICE OF RC IN THE ENVELOP
DETECTOR
 To obtain a high detection efficiency the resistance R must be much higher
than the differential resistance of rd of the diode (R>>rd).

 To minimize the ripple in the detected signal the product R.C must be much
higher than the period T of the carrier (RC >> T)
To avoid distortion by diagonal cutting the product RC must be smaller or equal to a
value, which depends on the modulating frequency, and on the modulation index. In
the case of the modulating signal with variable amplitude and frequency, the
maximum values of the frequency as well as of modulation index must be considered
CIRCUIT DIAGRAM

Figure 1.2 AM Demodulator

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Figure 1.3 Block diagram of AM Modulation and demodulation

CIRCUIT DESCRIPTION
DEMODULATOR
The Demodulator circuit consists of a Diode detector, Low pass filter and
amplifier.The AM modulated output from the Modulator circuit is given as input to
the diode OA79 in the Detector section of the circuit. The diode cuts off the negative
going portion of the AM wave. Capacitor charges up to the peak of the carrier cycle
through the low resistance of the rd (forward resistance of the diode) and then during
the negative half cycle tried to discharge through relatively high resistance RL.
Capacitor value is so chosen that the discharge is so small in the time between carrier
half cycles. Hence the capacitor voltage tends to follow the envelope of the carrier
and the voltage available across RL is simply the modulation envelop superimposed
on the carrier. A dc level in the output comes because the current through diode flows
in the form of pulses occurring at the peak of each carrier cycle.The LPF and the
amplifier smoothen and amplify the demodulated signal.

PROCEDURE
DEMODULATION
1) Connect the AM wave available at the output terminal of modulator to the
demodulator input terminals.
2) Connect the DSO to the detector output terminals. See that with the
variation of the modulating signal amplitude the amplitude of the detected
output changes and measure its frequency.
3) Compare the phase of input and output waveforms.

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TABULATION FOR DEMODULATION

S.No Modulation Demodulated Modulating signal Demodulated
signal voltage signal voltage frequency signal frequency
(Em) (fm)
(Em) (fm)

MODEL WAVEFORMS

Em

Figure 1.4 a: Modulating Signal t

EC

t
Figure 1.4 b : Carrier Signal

Emax
Emin
t

Figure 1.4 c : ModulatedSignal

Emax

Figure 1.4 d : Diode Detector output

Em t

t
Figure 1.4 e :Demodulated Signal

RESULT:

CONCLUSION

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It is observed that the amplitude of the carrier varies in accordance with the message
signal.

VIVA QUESTIONS:
1. What is modulation index?
2. What is the significance of modulation index?
3. Differentiate between under modulation & over modulation.

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Experiment No: 14

IMPLEMENTING ARITHMETIC OPERATIONS OF TWO NUMBERS

USING 8086 MICROPROCESSOR
Aim: To perform 8-bit Arithmetic Operations (addition, subtraction, multiplication
and division) using machine codes on 8086 Microprocessor Kit.

Equipment Required:

1) Micro 86/88 Hardware Kit

2) IBM-PC/AT Keyboard
3) 230V –AC Power Supply

Program:

ADDRESS LABEL OPCODE MNEMONIC OPERANDS COMMENTS

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Results:

Input Output
Operation
Address Data Address Data

Addition

Subtraction

Multiplication

Division

Conclusion:

Viva Questions:

1. What is an instruction?
2. Discuss different Arithmetic Instructions used in the program.
3. Explain various addressing modes used in the program.

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