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Course Plan DLD-2020

This document provides an overview of the Digital Logic Design course offered at the University of Sindh. The course introduces students to digital logic, gates, and digital circuits. It focuses on designing and analyzing combinational and sequential circuits. The course contents cover topics such as number systems, logic gates, simplifying logic circuits, latches and flip-flops, counters, arithmetic circuits, and memory. Students will be assessed through quizzes, assignments, midterm and final exams, lab files, lab performance, and a lab test. The goal is for students to understand basic computer hardware components and digital circuit design.

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Muhammad Asad
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73 views

Course Plan DLD-2020

This document provides an overview of the Digital Logic Design course offered at the University of Sindh. The course introduces students to digital logic, gates, and digital circuits. It focuses on designing and analyzing combinational and sequential circuits. The course contents cover topics such as number systems, logic gates, simplifying logic circuits, latches and flip-flops, counters, arithmetic circuits, and memory. Students will be assessed through quizzes, assignments, midterm and final exams, lab files, lab performance, and a lab test. The goal is for students to understand basic computer hardware components and digital circuit design.

Uploaded by

Muhammad Asad
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Digital Logic Design

INTRODUCTION TO COURSE

A S S I S TA N T P R O F E S S O R

shahid.larik@usindh.edu.pk

UNIVERSITY OF SINDH JAMSHORO


Course Overview

BS (Software Engineering) Part-I Second Semester


Morning / Evening 2020

Digital Logic Design (Theory + Lab)


SWEN-318 (2-C Theory)
SWEN-319 (1-CH Lab)

Course Tutor: Mr. Shahid Hussain Larik


Assistant Professor, IT, FET

2
Course Objective

This course introduces the concept of digital logic,


gates and the digital circuits. Further, it focuses on
the design and analysis combinational and sequential
circuits. It also serves to familiarize the student with
the logic design of basic computer hardware
components.

3
Course Contents

Number Systems: 
Representations of Numbers, the Binary Number System,
Binary-to-Decimal Conversion, Decimal-to-Binary
Conversion, Octal and Hexadecimal Number Systems,
Number Base Conversion of Integers, Number Base
Conversion of Fractions, Number Base Conversion of
Mixed Numbers, Number Base Conversion between
Numbers in any Bases, Negative Numbers, Sign and
Magnitude Representation, 1's Complement, 2's
Complement, Floating Point Representation and
Arithmetic.

4
Course Contents

Binary Logic Gates: 


AND Gate, OR Gate, Inverter and Buffer, NAND Gate, NOR
Gate, XOR and XNOR Gate, Combining Logic Gates.

Simplifying Logic Circuits: 


Sum of Products Method, Product of Sum Method, De-
Morgan's Theorem, NAND Logic Design, NOR Logic Design,
Karnaugh Maps, Karnaugh Maps of Three and Four Variables,
Multiplexers, De-multiplexers.

5
Course Contents

Digital Circuits: Logic signals and gates. CMOS logic,


CMOS circuits, steady- state electrical behavior, dynamic
electrical behavior, CMOS input and output structures.
Logic families and interfacing: CMOS logic families,
bipolar logic, TTL families, CMOS/TTL interfacing and
ECL logic families.

Latches and Flip-Flops: R-S Storage Latches, Clocked R-


S Latches, Clocked D Latches, Master Slave R-S and D-
Flip–Flop's, Master-Slave J-K, T and T=1 Flip-Flops,
Edge-Triggered Flip-Flops, Master-Slave Flip-Flops with
Data Lockout, Summary of Flip-Flops Characteristics.

6
Course Contents

Shift Registers: 
Serial-in Serial-Out, Serial-in Parallel-Out, Parallel-in Serial-
Out, Parallel-in Parallel-Out, Universal Shift Registers.

Counters: 
Ripple Counters, Mod 10 Ripple Counters, Synchronous
Counters, Counters as Frequency Dividers.

Arithmetic Circuits: 
Binary Addition, Half-Adders, Full-Adders, Three Bit Adders,
Binary Subtraction, Parallel Subtractors, using Adders for
Subtraction, Four Bit Adders/Subtractors, Binary Multiplication,
2's Complement Adder/Subtractors.

7
Course Contents

Memory Circuits: 
Random Access Memory, Read Only Memory, Programmable
ROM, Introduction to Programmable Logic Devices.

Logic Families: 
TTL Characteristics, Logic Levels and Noise Margin, CMOS
IC's, Interfacing TTL with CMOS and CMOS with TTL.

Coding Circuits: 
Binary Coded Decimals, BCD to Decimal Decoder, Priority
Encoders, BCD to Seven-Segment Decoder.

8
Teaching and Learning Methodology

 A variety of interactive teaching methods will be


used to attain the above objectives. This will include:

 Lectures (Presentations/Slides)
 Assignments / Project or Research Reports
 Discussion / Presentation.
 Quiz
 Laboratory Manuals + Matlab Tutorials

9
Learning Resources  Books Recommended:
 Text Book:
 Microelectronic Circuits By SEDRA/SMITH
Reference Books:
 Operational Amplifiers with Linear Integrated
Circuits
by: William D. Stanley(4th Edition)
 Digital Integrated Circuits-A Design Perspective
by: Jan M. Rabaey (2nd Edition)
 Microelectronics
by: Jacob Millman & Arvin Grabel (2nd Edition)

10
Text Book

Digital
Fundamentals

By Floyd
11th
Edition

11
Reference Books
Digital Systems Digital Circuits Analysis Digital Logic Design
Principles and Applications and Design
By: Brian Holdsworth
By: Ronald J. Tocci By: and Clive woods

12
Assessment Strategy
A time constrained examination conducted, in which the students have to
demonstrate depth and breadth of understanding of the course in terms of
learning outcomes (knowledge and ability outcomes). The Course weighting
100% is followed as per policy by statuary bodies of University of Sindh.

ASSESSMENT STRATEGY
Quizzes To assess student’s Knowledge
Assignments To assess student’s understanding
Mid Term Exam To assess student’s preparedness to judge problem
(One Hour Test) solving and analytical skills
Lab Files To assess student’s weekly performance
Lab Exams To assess student’s Practical Skills
Final Term Exam To assess student’s overall abilities in the field of
Control Engineering, their problem solving skills and
their approach toward solution of problems in the era
of control systems.

13
Assessment Schedule

Assessment Schedule

Assessment 1 Quizzes Week 3rd, 6th, 9th, 12th, 15th


Assessment 2 Mid Term Week 9th
Assessment 3 Assignments Week 6th, 14th
Assessment 4 Final Term Week 18th

Assignments:

The assignment topic will be assigned to each student according to the lecture topic.

14
Grading

Weighting of Assessment
Mid Term Examination 30% of Theory 30 Marks
Final Term Examination 50% of Theory 50 Marks
Quizzes 10% of Theory 10 Marks
Assignments 10% of Theory 10 Marks
Lab File and Performance 40% of Practical 40 Marks
Lab Viva Voce 30% of Practical 30 Marks
Lab Test 30% of Practical 30 Marks
     
Total 100% of Theory 100 Marks
  100% of Practical 100 Marks

15
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