ECE-EEE-INSTR-CS F215 - DD - Sem-1 2021-22 HO

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BITS PILANI, DUBAI CAMPUS

ACADEMIC – UNDERGRADUATE STUDIES DIVISION


First Semester 2021 – 2022
Course Handout (Part – II)
Date:05.09.2021

In addition to Part I (General Handout for all courses appended to the Time Table) this portion further specific details
regarding the course.

Course No. : ECE F215 /EEE F215/CS F215(3 14)


Course Title : Digital Design
Instructor-in-charge : Dr. Jagadish Nayak
Instructors : Dr. Shazia Hasan, Dr. R. Swarnalatha, Dr. Jagadish Nayak, Dr. Nilesh Goel,
Dr. V. Gaidhaen, Dr. Abdul Rajak, Dr Sunil Thomas.

Scope and Objective of the Course:


The objective of the course is to impart knowledge of the basic tools for the design of digital circuits and to provide
methods and procedures suitable for a variety of digital design applications. The course introduces Verilog for digital
circuit simulation and fundamental concepts of computer organization. The course also provides laboratory practice
using MSI devices.

Course Pre/Co- requisite (if any)& Catalogue / Bulletin Description:Given in the Bulletin2021-2022

Study Material:
Text book [TB]:
TB1. M. Morris Mano and Michael D. Ciletti “ Digital Design”, Pearson Edu., 5th Edition, 2013.
Reference book(s) [RB]:
RB1. J. Bhasker, "A Verilog HDL Primer ", BS Publications, 3rd Edition.
RB2. A. Anand Kumar, “Fundamentals of Digital Circuits”, PHI 4 th Edition.

Course Plan / Schedule:

Lec.No Learning objectives Contents Text and Ref. Book


1 Introduction Logic definition, Verilog basic TB1: Ch 1, RB1, RB2-Ch1,
Class Notes
2-4 Codes Number system, Codes, error detection and TB1: Ch 1,2 RB1, RB2:ch-
correction codes, parity detection, hamming 2,3 and Class Notes
code
5-7 Logic gates, Boolean functions and Logic gates, Boolean algebra, functions, TB1: Ch 2,3, RB2: Ch4,5,6 and
postulates, K-Map caconical form, 3-4 variable K-Map. Class Notes

8-10 Combinational circuits, Adder, Design of adder and subtractor, TB1: Ch 4, RB1, RB2: Ch7
subtractor parallel adder, adder-cum-subtractor, BCD and Class Notes
adder
11-13 Combinational Logic Comparators, Decoders, encoders TB1: Ch 4, RB2: Ch7 and
Class Notes
14-16 MSI Components Multiplexer and de-multiplexer TB1: Ch 4, RB1, RB2: Ch7
and Class Notes
17-19 Sequential circuit elements Introduction, latches and flip flops, flip-flop TB1: Ch 5, RB1: Ch 7, RB2:
conversion Ch7 and Class Notes
20 Verilog Verilog examples of Latches and flip-flops RB1, RB2: Ch7 and Lecture
Notes
21-24 Clocked sequential circuits Analysis of clocked sequential circuits TB1: Ch 5, RB1, RB2:
Ch10,13 and
Class Notes
25-26 FSM Moore and mealy machine and verilog RB1: Ch 5, RB2: Ch14 and
Class notes
27-29 Synthesis of clocked sequential State reduction and assignment. Design of TB1: Ch 5, RB1, and
circuits sequential circuits. Class Notes
30 Verilog Sequential circuit design (sequence detector RB1: ch5, RB:1 and class
etc.) notes
31-35 Counters Synchrounus and asynchronous counter TB1: Ch 6, and Class Notes
circuit design.
36 Verilog Counter examples using verilog RB1, class notes
37-38 Registers Shift registers, universal shift register. TB1: Ch 6, and
Class Notes
39-40 Convertors Analog to digital and Digital to analog RB2: and Class Notes
convertors
41-42 Memory and PLDs RAM, ROM, PLA, PAL TB1: Ch 7 and Class Notes

Laboratory Experiments:

Sl. No. List of experiments

1. Familiarization with hardware laboratory equipments


2. Familiarization with software tool and environment
3. Implementation of boolean functions
4. Adders and subtractors
5. Decoder and comparator
6. Multiplexer and Demultiplexer
7. Latches & flip-flops
8. Finite state Machines
9. Counters
10. Sequence detector and Shift register
* The lectures may be slightly diverge from aforesaid plan based on students ‘background & interest in the topic, which may perhaps
include special lectures and discussions that would be planned and schedule notified accordingly.

Evaluation scheme:

EC Evaluation Nature of Duration Weightage Date & Time Venue


No. Components Component %
1 Test - 1 Closed Book 50 minutes 20 04.10.2021 M8
2 Quiz-1 Closed Book 20 Minutes 05 25.10.2021 M8
3 Test - 2 Open book* 50 minutes 20 08.11.2021 M8
Practical: Regularity,
4 7.5+7.5 Continuous Evaluation
Lab reports Open book* ------- (R. No:
Partial Open 304 and
5 Lab Compre 2 hours 10 To be announced later 303)
book***
6 Compre. Exam Closed Book 3 hours. 30 29-12-2021 FN

* Only prescribed text book(s) and hand written notes are permitted, lab manual is not allowed in test-2 component.
*** Only lab manuals are allowed and IC data sheets will be provided by us.

Tutorials: Tutorial sheets will be provided before classes. This will help you to enhance your abilities in problem
solving. Assistance will be given in solving them during the classes. No makeup will be provided for tutorials.

Mid-sem Grading:
Mid-sem grading will be displayed after two evaluation components in theory and five experiments in lab are
completed.
Note: A student will be likely to get “NC”, if he / she
• Doesn’t appear / appear for the sake of appearing for the evaluation components / scoring zero in pre-compre
total.
• Scoring zero in the lab component / Abstaining from lab classes throughout
Makeup and Attendance policies:
Make-ups: are not given as a routine. It is solely dependent upon the genuineness of the circumstances under which a
student fails to appear in a scheduled evaluation component. In such circumstances, prior permission should be obtained
from the Instructor-in-Charge (I/C).Students with less than 60% of attendance will not be allowed to avail the make-
ups. The decision of theI/C in the above matter will be final.
Attendance: Every student is expected to be responsible for regularity of his/her attendance in class rooms and
laboratories, to appear in scheduled tests and examinations and fulfill all other tasks assigned to him/her in every course.
A student should have a minimum of 60% of attendance in a course to be eligible to appear for the Comprehensive
Examination in that course. For the students under the purview of Academic Counseling Board (ACB), the Board shall
prescribe the minimum attendance requirement on a case-to-case basis. Attendance in the course will be a deciding
factor in judging the seriousness of a student which may be directly / indirectly related to grading.
General timings for consultation:
Chamber consultation hour is Thursday 9th Hourfor all instructors.
General instructions:
Students should come prepared for classes and carry the prescribed text book(s) or material(s) as advised by the Course
Faculty to the class.
Notices:
All notices concerning the course will be displayed on the respective Notice Boards.

Dr. Jagadish Nayak


Instructor-in-Charge
ECE /EEE /INSTR /CS F215

Instructors’ Contact Details:

Dr. Nilesh Goel


Room No:330-A2 Contact No +971 - 4 2753700 Ext.316
Mobile No. +971-589213648, Email: nileshgoel@dubai.bits-pilani.ac.in

Dr. R. Swarnalatha
Room No. 137 Contact No. +971-427353700 Ext 434
Mobile No. +971 55595 5175 , Email: swarnalatha@dubai.bits-pilani.ac.in

Dr. Shazia Hasan


Room No:303 Contact No +971 - 4 2753700Ext. 408
Mobile No: +971-568297187, Email: shazia.hasan@dubai.bits-pilani.ac.in

Dr. Jagadish Nayak


Room No. 330 Contact No. +971 - 4 2753700 Ext. 436
Mobile No. +971-554907979, Email: jagadishnayak@dubai.bits-pilani.ac.in

Dr. Abdul Rajak


Room No. 282 Contact No. +971 - 4 2753700 Ext. 346
Mobile No. +971- 509563993, Email: abdulrazak@dubai.bits-pilani.ac.in

Dr. V. Gaidhane
Room No:304A Contact No +971 - 4 2753700Ext. 406
Mobile No: +971-503438564, Email:vhgaidhane@dubai.bits-pilani.ac.in

Dr. Sunil Thomas


Room No:302A Contact No +971 - 4 2753700Ext. 402
Mobile No: +971-50 4119654 , Email: sunilthomas@dubai.bits-pilani.ac.in

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