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Digital System Design

The document provides an introduction to sequential logic circuits, which differ from combinational logic circuits in that their output depends not only on current inputs but also on the circuit's internal memory of previous states. It discusses the basic sequential logic components of latches and flip-flops. Latches can store a single bit and have two main types - the S-R latch and the gated S-R latch. The S-R latch has two stable states, set and reset, while the gated S-R latch includes an enable input that must be active for the latch to change states based on its other inputs. Multivibrators are circuits using feedback that can operate as bistable, monostable, or ast

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35 views

Digital System Design

The document provides an introduction to sequential logic circuits, which differ from combinational logic circuits in that their output depends not only on current inputs but also on the circuit's internal memory of previous states. It discusses the basic sequential logic components of latches and flip-flops. Latches can store a single bit and have two main types - the S-R latch and the gated S-R latch. The S-R latch has two stable states, set and reset, while the gated S-R latch includes an enable input that must be active for the latch to change states based on its other inputs. Multivibrators are circuits using feedback that can operate as bistable, monostable, or ast

Uploaded by

David
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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DIGITAL SYSTEM DESIGN

1.1 Introduction:
The sequential logic studies digital circuits which functions in such a way that their outputs
logic states depend not only on the logical combination of their inputs states, but also on the
memory of the circuit. In fact, at a given instant, sequential circuits always store the status of
their output and that status cannot change unless new logic signals are sent to its inputs: this
is the memory effect. The simplest sequential logic circuit is the latch which is a circuit
capable of storing one bit of information. It has two outputs, one being the reverse of the
other. A flip-flop is an edge triggered latch; it means that it cannot function unless the right
signal edge (either rising or falling edge) is available at its clock input. This chapter is an

introduction to sequential logic; it is focused on the study of latches and flip-flops which are
tools used in the designing of sequential circuits.

1.2 Multivibrators
Let us consider the following circuit:

According to the functioning of the OR gate, if A = 1, the output must be 1. However, if A is


in low logic state, we cannot guarantee the logic state of the output. Since the output feeds
back to one of the OR gate inputs, this circuit will “latch” (That is to remain unchanged) in
the 1 output state after any time that A is 1. In fact, when A = 0, the output could be 0 or 1
depending on the circuit previous state. So the output maintains (or memorises) its last state
when A is 0. The truth table of our circuit can be given as follow.
Any circuit employing feed back is called multivibrator. A bistable multivibrator can hold
stable in one of two possible states (either 0 or 1). Monostable multivibrator holds stable only
in one output state, the other state being momentary. Astable multivibrator has no stable state.
It oscillates back and forth between an output of 0 and 1. One of the most common
multivibrators is the integrated circuit NE555, which can work as well as monostable or
astable.

1.2.1 Latches:
Many latches exist, but their common characteristic is that they can store one bit of
information.

1.2.1.1 The S-R latch:


The S-R latch is a bistable multivibrator having two stable states: Set and Reset. So S-R latch
means Set-Reset latch. To create an S-R latch, can wire two NOR gates in such a way that the
output of one feeds back the input of another, and vice versa.

Figure 1.1: Principle diagram of an S-R latch


Truth table:

 The outputs Q and /Q should always be in opposite logic states.


 Making both S and R inputs equal to 1 results in both Q and /Q being 0: this is why
this inputs combination is forbidden, it produces an invalid or illegal state.
 Making S = 1 and R = 0 sets the multivibrator so that Q = 1 and /Q = 0.
 Making R = 1 and S = 0 resets the multivibrator so that /Q = 1 and Q = 0.
 When R = 0 and S = 0 the multivibrator outputs lath in their previous states.

Circuit diagram:

Exercise 1.1:
The following waveforms are applied at the inputs of an S-R latch. Deduce the waveform of
the output assuming that the initial state of the output is Q = 0.

The waveforms of the output Q of the exercise above can be given as follows:

1.2.1.2 The gated S-R latch:


The gated S-R latch has an enable input E which must be activated in order to allow the latch
to take into consideration the combinations available at its inputs. The latch would not
function properly unless the right logic level is sent to the input E. The principle diagram of a
gated S-R latch is given bellow.

Figure 1.2: Principle diagram of a gated S-R latch.


Truth table:

When E = 0, the outputs of the two AND gates are forced to 0, regardless of
the states of either S or R. The previous states of the outputs are therefore
memorised. Only when the enable input is activated (by sending a 1 to it) will the
latch respond to the S an R inputs.

Circuit diagram:

Exercise 1.2:
The following waveforms are applied at the inputs of a gated S-R latch. Deduce the
waveform of the output assuming that the initial state of the output is Q = 0.
The waveform of the output Q of the exercise 7.2 above can be given as follows:

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