EEE241 DLDlect 01
EEE241 DLDlect 01
EEE241 DLDlect 01
+5 +5
1 0 1
V V
Time Time
–5 –5
Digital: Analog:
only assumes discrete values values vary over a broad range
continuously
Time
Continuous in
Analog value & time
Digital
Discrete in
Asynchronous
value &
continuous in
time
Synchronous Discrete in
with the clock value & time
05/20/2023
Advantages: 7
Cheap electronic circuitry
Easier to calibrate and adjust
Immunity to noise
Noise margin
Noise added
Sender Receiver
Signal Signal
(512.74)10
Riaz Hussain (rhussain@comsats.edu.pk) CUI-IBD-ECE EEE241 DLD Chapter-01
05/20/2023
Binary Systems 10
Review, how the decimal system is designed?
Base (Radix) 10
Symbols: 0, 1, 2, … 8, 9
What if quantity greater than 9?
Add more significant digits to the left
Each position carries a weight
Example: 7392
7 × 103 + 3 × 102 + 9 × 101 + 2 × 100 = 7392
Seven thousand three hundred and ninety two
Weightage increases as the digit placement moves to left and vice
versa
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11
What if weightage is less than 10 0
We use the symbol point (.) and write the number to the
right
MSD → 103 102 101 100 . 10 -1
10-2← LSD
Base-10 is default base for numbering system
But, we can generalize the rule for any base-r
system from the base-10 (decimal) number system
Base (Radix) is “r”
Symbols: 0 → (r – 1)
Weightage of each number increases by a factor of “r”
as its placement moves to the left
r3 r2 r1 r0 . r-1 r-2
Riaz Hussain (rhussain@comsats.edu.pk) CUI-IBD-ECE EEE241 DLD Chapter-01
Binary Systems…continued 3
05/20/2023
12
Example: an…a5a4a3a2a1a0 a-1a-2a-3…a-m .
an × rn +…a5 × r5 + a4 × r4 + a3 × r3 + a2 × r2 + a1 × r1 + a0 ×
r0 + a-1 × r-1 + a-2 × r-2 + a-3 × r-3 + … a-m × r-m
Simplified:
aj = {0 → (r – 1)}
j is the location of digit “aj” of the quantity in decimal
numbers is:
3 23=8 11 211=2048
4 24=16 12 212=4096
5 25=32 20 220=1M Mega
Quinary System
Base (Radix): “5”
Symbols: 0, 1, 2, 3, 4
Weightage of each number increases by a factor of
“5” as its placement moves to the left
Example:
(4021.2)5 (Don’t call it four thousand and twenty one,
but four, zero, two, one, point two)
Octal System
Base (Radix): “8”
Symbols: 0, 1, 2, … 6, 7
Weightage of each number increases by a factor of
“8” as its placement moves to the left
Example:
(127.4)8 (Don’t call it one twenty seven point four, but
one, two, seven, point four)
Binary
Quinary
Octal
Hexadecimal
0.625 x 16 = A: a-1 = A
0.0x 16 = 0.0: a-2 = 0
(0.A0)16
(48.5625)10 = (110000.1001)2
(48.5625)10 = (143.2401)5
(48.5625)10 = (60.44)8
(48.5625)10 = (30.90)16
Evaluate
Magnitude Octal
(Base 8)
Evaluate
Magnitude
Decimal Binary
(Base 10) (Base 2)
Hexadecimal
Evaluate (Base 16)
Magnitude
Riaz Hussain (rhussain@comsats.edu.pk) CUI-IBD-ECE EEE241 DLD Chapter-01
05/20/2023
Conversion between Number Systems 30
…continued 9
2138
10001011
8 B16
1 1 Carry
5 5
+ 5 5
1 1 0
= Ten ≥ Base
Binary Addition
1 1 1 1
101101 ← augend
+1 0 0 1 1 1 ← addend
1010100
1 1 1 1 1 1
1 1 1 1 0 1 = 61
+ 1 0 1 1 1 = 23
1 0 1 0 1 0 0 = 84
≥ (2)10
101101 ← minuend
−1 0 0 1 1 1 ← subtrahend
000110
1 2 = (10)2
0 2 2 0 0 2
1 0 0 1 1 0 1 = 77
− 1 0 1 1 1 = 23
0 1 1 0 1 1 0 = 54
1011 ← multiplicand
× 101 ←multiplier
1011
0000
1 0 1 1_____
110111
1 0 1 1 1
x 1 0 1 0
0 0 0 0 0
1 0 1 1 1
0 0 0 0 0
1 0 1 1 1
1 1 1 0 0 1 1 0
Dividend Divisor
↓ ↓
1000001/1100=?
101 . ← Quotient
1100/1000001
1100↓↓ ← shift, if divisor is bigger and write 1 in quotient
010001 ← subtraction
1100 ← since brought down two bits write 01 in quotient
0101 ← Remainder
24 – 1 = (1111)2
= 753299 + 1 = 753300
M–N=?
1. Add the minuend “M” to the r’s complement of subtrahend
“N”
M + (rn – N) = M – N + rn
2. If M ≥ N, the sum will produce an end carry and will be
discarded
3. If M < N, then there will be no end carry in the sum and the
sum will be
rn – (N – M), which is r’s complement of (N – M)
So, take the r’s complement of the sum and place negative sign in front
05/20/2023
…continued 2 47
Examples:
1. 72532 – 3250 = ? (M ≥ N)
M = 72532
10’s complement of N = + 96750
169282
Discard the end carry M – N = 69282
05/20/2023
…continued 3 48
Examples for binary numbers (same principle):
1. 1010100 – 1000011= ? (M ≥ N)
M= 1010100
2’s complement of N = +0111101
10010001
Discard the end carry M – N = 1 0 0 0 1
05/20/2023
…continued 4
Subtraction of unsigned numbers can also be done using (r – 1)’s49
complement
(r – 1)’s complement is 1 less than r’s complement,
So, the sum of minuend and the complement of subtrahend is
1 less than correct difference, when an end carry occurs
So, to get the correct difference remove the carry and add 1,
i.e. end around carry
1. 1010100 – 1000011= ?
M = 1010100
An example of (M ≥ N) 1’s complement of N =+0111100
10010000
If carry, end around carry
0010000
+ 1
M–N=0010001
05/20/2023
…continued 5 50
Subtraction of unsigned numbers can also be done using (r – 1)’s complement
When the sum of minuend and (r – 1)’s complement has no end
carry then take (r – 1)’s complement of the sum and place
minus sign
1. 1000011 – 1010100 = ?
An example of (M < N)
M = 1000011
1’s complement of N = + 0 1 0 1 0 1 1
1101110
No end carry, so take
(r – 1) ‘s complement of the sum = 0 0 1 0 0 0 1 and
place negative sign
M–N=–10001
05/20/2023
Positive integers (0, 1, 2, . . . ) can be represented as
51
unsigned numbers
For negative numbers in ordinary arithmetic, we use minus
sign
However, Computer hardware has to represent everything in
bits
So, the left most bit is used to represent the sign
It is important that representation is known in advance
Unsigned
(01001)2 = (9)10 (11001)2 = (25)10
Signed:
(01001)2 = (9)10 (11001)2 = (– 9 )10
Signed magnitude convention: i.e. magnitude and the symbol (+ or –) or (0 or 1)
Riaz Hussain (rhussain@comsats.edu.pk) CUI-IBD-ECE EEE241 DLD Chapter-01
Signed Binary Numbers
05/20/2023
…continued 2
Signed magnitude convention is the one used in ordinary arithmetic52
However, in computers, arithmetic operations are implemented using
signed complement system
Magnitude of
Convenient
9
Signed 1’s complement (relatively difficult)
Signed 2’s complement (Easier, more common) 1’s
(– 9)10 represented in three systems (using 8 bits) complement
of 9
Signed magnitude representation: 10001001
Signed 1’s complement representation: 11110110 2’s
complement
Signed 2’s complement representation: 11110111 of 9
In all three systems
Sign bit:
Left most bit represents (positive or negative sign) representing
The remaining part represents magnitude or complement –ve number
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53
4-bits (Left most for sign and 3 bits for magnitude or complement)
0–7
Supplementary Reading:
http://ecse.bd.psu.edu/cse
271/twoscomp.pdf
Riaz Hussain (rhussain@comsats.edu.pk) CUI-IBD-ECE EEE241 DLD Chapter-01
Signed Binary Numbers…continued 4
05/20/2023
Arithmetic addition
54
Ordinary arithmetic (sign magnitude system) requires comparison of
signs and magnitudes
Signed complement system does not require comparison or
subtraction
05/20/2023
55
Arithmetic addition using signed-2’s complement
Negative numbers must be in the form of signed-2’s complement
The result is also obtained in the signed-2’s complement form
+ 6 0000 0110 – 6 1111 1010
+ 13 0000 1101 + 13 0000 1101
+19 0001 0011 + 7 10000 0111
Carry discarded
+ 6 0000 0110 Ans: 0000 0111
– 13 1111 0011
– 7 1111 1001 – 6 1111 1010
– 13 1111 0011
– 19 11110 1101
Carry discarded
Ans: 1110 1101
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56
Arithmetic addition
Buffer overflow
Overflow is a problem in computers because the number of bits
that hold a number is finite, and a result that exceeds the finite
value by 1 cannot be accommodated.
If we start with two n‐bit numbers and the sum occupies n + 1 bits, we
say that an overflow has occurred
Example: (4 bit signed number addition using signed-2’s-complement)
+ 4 0100
+ 5 0101
+ 9 1001
BUT, 1 0 0 1 is the representation of – 7 and not 9
In order to obtain a correct answer, we must ensure that the result has a
sufficient number of bits to accommodate the sum.
Riaz Hussain (rhussain@comsats.edu.pk) CUI-IBD-ECE EEE241 DLD Chapter-01
Signed Binary Numbers…continued 6
05/20/2023
57
• Arithmetic subtraction using signed-2’s complement
Take the 2’s complement of the subtrahend (including the
sign bit) and add it to the minuend (including the sign bit). A
carry out of the sign‐bit position is discarded.
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58
Why Signed-Complement System?
It is worth noting that binary numbers in the signed‐complement
system are added and subtracted by the same basic addition
and subtraction rules as unsigned numbers. Therefore,
computers need only one common hardware circuit to
handle both types of arithmetic.
05/20/2023
60
• Example: A
binary code Color Binary Number
Red 000
for the seven
Orange 001
colors of the Yellow 010
rainbow Green 011
• Code 100 is Blue 101
not used Indigo 110
Violet 111
05/20/2023
61
05/20/2023
…continued 2 62
4 0100
+ 5 0101
• BCD Addition: 9 1001
4 0100
+ 8 1000
12 1 1 0 0 not a valid BCD number
0 1 1 0 for correction add 6
10010
= (0001 0010)BCD
8 1000
+ 9 1001
17 1 0 0 0 1 end carry
0 1 1 0 for correction add 6
10111
= (0001 0111)BCD
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63
• Wighted Codes:
• Each bit has associated weightage
• e.g.
• BCD (8421)
• 2421 Codes:
• Left most bit has weightage of 2
• Right most bit has wieghtage of 1
• Self complementing Codes:
• 9’s complement of the decimal code is directly obtained by
changing 1s to 0s and 0s to 1s
• e.g.
• 2421 Codes
• Excess-3
• Binary value + 3
05/20/2023
Codes 65
• American Standard Code for Information
Interchange
• This code is a popular code used to represent
information sent as character-based data. It
uses 7-bits to represent:
– 94 Graphic printing characters.
– 34 Non-printing characters
• Some non-printing characters are used for text
format (e.g. BS = Backspace, CR = carriage
return)
05/20/2023
66
H=(1001000)
05/20/2023
67
• Redundancy (e.g. extra information), in the form of extra
bits, can be incorporated into binary code words to detect
and correct errors.
• A simple form of redundancy is parity, an extra bit
appended onto the code word in the most significant position
to make the number of 1’s odd or even. Parity can detect all
single-bit errors and some multiple-bit errors.
05/20/2023
68
7
TX RX
At the receiver side:
If an even parity is
Parity bit
detected, send an ACK
Transmit Ha in ascii: control = 00000110
1001000 1100001 If error was detected
Transmit with even parity:
send negative
01001000 11100001 acknowledge NAK =
10010101
05/20/2023
GRAY CODE
69
Binary Gray
000 000
001 2 bit changes 001
010 011
011 2 bit changes 010 Only 1 bit changes
100 110
101 2 bit changes 111
110 101
111 100
As we “count” up or down in decimal, the code word
for the Gray code changes in only one bit position as
we go from decimal digit to digit including from 9 to 0.
05/20/2023
70
Register:
0000
Device for holding data 0001
0010
Most common device for holding data 0011
0100
Array of binary cells 0101
Cell is capable of storing a bit (0, 1) information 0110
0111
Can be set to one of two states 1000
1001
An “n” cell register can be one of 2n states 1010
0 → 2n – 1 1011
1100
Example: n=4 1101
1110
1111
05/20/2023
…continued 2 71
Register Transfer
register transfer operation is
a basic operation that
consists of a transfer of
binary information from
one set of registers into
another set of registers.
05/20/2023
…continued 3
72
Example of binary
information processing
05/20/2023
73
Deals with variable that can take on two discrete values
1, 0
True, False
Yes, No
Variables are designated as
A, B, C, x, y, z, etc.
Binary logic or Boolean algebra has three basic logical
operations
AND
OR
NOT
05/20/2023
74
AND operation:
Represented by dot “∙” operator or absence of operator
Read as “x AND y = z”
x ∙ y = z; (x, y, z are binary variables)
Truth table
x y z=x.y
0 0 0
0 1 0
1 0 0
1 1 1
z = 1; if x = 1 and y = 1
Symbol
05/20/2023
75
OR operation:
Represented by plus “+” operator
Read as “x OR y = z”
x + y = z; (x, y, z are binary variables)
Truth table
x y z=x+y
0 0 0
0 1 1
1 0 1
1 1 1
05/20/2023
76
NOT operation:
Represented by prime “’” operator or overbar operator
x’ = z
x=z
Read as “NOT x = z”
X’ = z; (x, z are binary variables)
Truth table x z = x’
0 1
1 0
05/20/2023
77
Binary logic should not be confused with binary arithmetic
Operators used are also identical
Dot “.” for multiplication and also for AND
Plus “+” for addition and also for OR
Prime “’” for complement and also for NOT
05/20/2023
79
Logic Gates:
Electronic circuits operating on one or more input signals to produce
an output signal
AND OR
http://www.mathsisfun.com/binary-number-system.html
http://en.wikipedia.org/wiki/Binary_number
http://www.basic-mathematics.com/base-five.html
http://www.facstaff.bucknell.edu/mastascu/elessonshtml/Lo
gic/Logic1.html
http://ecse.bd.psu.edu/cse271/twoscomp.pdf
http://www.williamson-labs.com/480_logic.htm