Scribd
Upload
1 views

EEE 241 Digital Logic Design

The document outlines the course EEE 241 Digital Logic Design at COMSATS University Islamabad, covering topics such as number systems, Boolean algebra, combinational and sequential logic design, and semiconductor memory. It includes course learning outcomes, assessment methods, and a detailed lecture breakdown. The course aims to equip students with the skills to analyze and design digital circuits effectively.

Uploaded by

Mr USAMA ALAM SHER
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
1 views

EEE 241 Digital Logic Design

The document outlines the course EEE 241 Digital Logic Design at COMSATS University Islamabad, covering topics such as number systems, Boolean algebra, combinational and sequential logic design, and semiconductor memory. It includes course learning outcomes, assessment methods, and a detailed lecture breakdown. The course aims to equip students with the skills to analyze and design digital circuits effectively.

Uploaded by

Mr USAMA ALAM SHER
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 5

EEE 241 Digital Logic Design

COMSATS University Islamabad

Sahiwal Campus

COURSE DESCRIPTION FILE

EEE 241 Digital Logic Design

DEPARTMENT OF ELECTRICAL ENGINEERING

Course-Mediator Departmental Head

------------------------------ ------------------------------

COMSATS University Islamabad, Sahiwal Campus Page


EEE 241 Digital Logic Design

EEE 241 Digital logic Design (3+1)


Course Catalog Description:
Introduction to Digital Computer and Systems, Number Systems, Binary Arithmetic, Boolean Algebra,
Algebraic Manipulation, Canonical and Standard Form & Conversions, Logical Operations and Gates,
Simplification of Functions, Karnaugh Map Methods, Two Level Implementations, Don’t Care
Conditions, Combinational Logic Design, Arithmetic Operations and Circuits, Analysis Procedures,
Multilevel NAND/NOR Circuits, adders, comparators, code converters, parity generators/checkers,
Decoders, Encoders, Multiplexers, Demultiplexer, Sequential Logic, Flip-Flops, Clocked Sequential
Circuits, State Machine Concept, Design of Sequential Circuits using State Machines, Counters and
their Design, Synchronous Counters, Asynchronous Counters, Shift Registers etc., and its types,
semiconductor memory basics, cloud storage, introduction to SPLDs, CPLDs and FPGA.

Textbook:
1. Thomas L. Floyd, Digital Fundamentals, 11th Edition.

Reference Books:
1. M. Morris Mano & Charles R. Kime, Logic and Computer Design Fundamentals, 4th Edition
Prentice Hall.

Course Learning Outcomes:


After successfully completing this course, the students will be able to:

CLO1: Apply basic engineering knowledge to understand digital logic circuits. (C2- PLO1)

CLO2: Analyze Boolean functions to compute simplified versions of complex digital circuits. (C3-
PLO2)

CLO3: Design and development of combinational and synchronous sequential circuits. (C5-
PLO3)

CLO4: Investigate complex digital circuits by examining its logic. (C4-PLO4)

Table 1. Mapping of CLOs with PLOs.


CLOs PLOs
PLO1 PLO2 PLO3 PLO PLO5 PLO6 PLO7 PLO8 PLO9 PLO1 PLO11 PLO12
4 0
CLO1 C2
CLO2 C3
CLO3 C5
CLO4 C4

COMSATS University Islamabad, Sahiwal Campus Page


EEE 241 Digital Logic Design

Table 2. Mapping of CLOs with Working knowledge profiles.


CLOs Wks
Wk1 Wk2 Wk3 Wk4 Wk5 Wk6 Wk7 Wk8
CLO1 
CLO2 
CLO3 
CLO4 

Learning Outcomes Assessment Plan:


Table 3. Assessment Plan for Course Learning Outcomes
Sr. # Course Learning Outcomes Assessment
1. Assignment 1
2. Assignment 2
3. Assignment 3
4. Assignment 4
5. Assignment 5
6. Quiz 1
7. Quiz 2
8. Quiz 3
9. Quiz 4
10. Quiz 5
11. Midterm
12. Terminal

Assessment scheme:
Table 4. Course assessment scheme. * Theory weighs 75% of the overall subject marks.
Assessment Weightage
Quizzes 15%
Assignments 10%
Midterm 25%
Terminal 50%
Total 100%

COMSATS University Islamabad, Sahiwal Campus Page


EEE 241 Digital Logic Design

Lecture Breakdown (32 Lectures)


Lecture # Topics Covered
Digital and Analog Quantities, Binary Digits, Logic Levels and Digital
1 Waveform, Basic Logic Operations. Number Systems (2, 8, 10, 16) and their
inter-conversion.
Binary Arithmetic, 1's and 2's Complements, Hexadecimal and Octal
2
Numbers.
Signed Numbers, Arithmetic Operations with Signed Numbers, Binary
3
Coded Decimal (BCD), Digital Codes.
The Inverter, AND, OR, NAND, NOR Gates, Exclusive-OR and Exclusive-NOR
4
Gates.
5 Boolean Expressions, Rules. Demorgan's Theorems.
Demorgan's Theorems. Boolean Analysis of Logic Circuits. Logic
6
Simplification using Boolean Algebra.
Standard Forms of Boolean Expressions, Boolean Expressions and Truth
7
Tables.
8 The Karnaugh Map, Karnaugh Map SOP Minimization.
9 Basic Combinational Logic Circuits and their implementation.
The Universal Property of NAND and NOR Gates. Combinational Logic using
10
NAND Gates.
Combinational Logic using NOR Gates. Logic Circuit Operation with Pulse
11
Waveform Inputs.
12 Half and Full Adders, Parallel Binary Adders.
13 Ripple Carry and Look-Ahead Carry Adders.
14 Comparators.
15 Parity Generators/Checkers.
16 Decoders.
17 Midterm
18 Midterm
19 Encoders
20 Multiplexers (Data Selectors).
21 Demultiplexers.
22 Latches.
23 Flip-Flops.
24 Shift Register Operations. Types of Shift Register Data I/Os.
25 Bidirectional Shift Registers.
Analysis of Clocked Sequential Circuits: State Equation, State Table, State
26
Diagram. Finite State Machines.
27 Asynchronous Counters: 2/3-bit Asynchronous Binary Counter.
28 Synchronous Counters: 2/3-bit Synchronous binary counter.
Asynchronous Decade Counter, Synchronous Decade Counter, Up/Down
29
Synchronous Counters.
30 Design of Synchronous Counters.
31 Introduction to Simple/Complex Programmable Logic Devices (SPLDs,
CPLDs), Field-Programmable Gate Arrays (FPGAs), Programmable Logic

COMSATS University Islamabad, Sahiwal Campus Page


EEE 241 Digital Logic Design

software.
Introduction to Semiconductor Memory Basics, The Random-Access
32
Memory (RAM), The Read-Only Memory (ROM), Cloud Storage.

Version Applicable From

Version 1 SPRING 2019

Version 2 FALL 2019

Version 3 SPRING 2021

Version 4 SPRING 2025

COMSATS University Islamabad, Sahiwal Campus Page

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy